ASIC Engineering Technical Leader

Cisco
Switzerland
Workplace: HybridFull timeFunction: Hardware, Embedded & Systems EngineeringEducation: bachelorsSkills: ["Technical leadership","Verification strategy","Cross-functional collaboration","Programming","Problem-solving"]

Define, design, and verify high-performance ASIC subsystems across Cisco platforms. Own the architecture and design of complex analog and mixed-signal circuits, establish verification strategies, and align power, performance, and area targets. Partner with cross-functional teams to shape packaging and hardware requirements, and develop reusable code methodologies and advanced digital design flows to enable scalable, high-volume ASIC releases.

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FursaFursa
Cisco
Cisco
1 month ago

ASIC Engineering Technical Leader

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Last checked: 12 hours agoStatus: Live

Job Summary

Define, design, and verify high-performance ASIC subsystems across Cisco platforms. Own the architecture and design of complex analog and mixed-signal circuits, establish verification strategies, and align power, performance, and area targets. Partner with cross-functional teams to shape packaging and hardware requirements, and develop reusable code methodologies and advanced digital design flows to enable scalable, high-volume ASIC releases.
Location: Switzerland
Workplace: Hybrid
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Define, design, and verify high-performance ASIC subsystems deployed across Cisco platforms.
  • •Oversee architecture and design of complex analog and mixed-signal circuits.
  • •Establish robust ASIC verification strategies and drive technical execution.
  • •Collaborate with cross-functional teams to influence packaging and hardware requirements for PPA goals.
  • •Develop reusable code methodologies, physical design functions, and advanced digital design flows for high-volume ASIC releases.

Key Requirements

  • •Bachelors + 12 years (or Masters + 8 years, or PhD + 5 years) or equivalent related work experience.
  • •Extensive experience designing high-frequency CMOS circuits and custom analog/mixed-signal circuits.
  • •Proficiency with Cadence Virtuoso, including custom layout, DRC, LVS, and parasitic extraction.
  • •Strong programming skills using languages such as Skill, VerilogA, Tcl, Perl, Python, Matlab, or C.
Experience:ASICAnalogMixed-signalHigh-frequency CMOSWireline SerDesSignal processing
Education:Bachelor's
Skills:Technical leadershipVerification strategyCross-functional collaborationProgrammingProblem-solving
Tech Stack:Cadence VirtuosoSkillVerilogATclPerlPythonMatlabCDRCLVSParasitic extractionSiemens/MentorSynopsysEMXMomentumHFSSSOSJira

Company Brief

Cisco
Global technology company that designs, manufactures, and sells networking hardware, telecommunications equipment, and high-technology services and products for enterprises, service providers, and governments worldwide.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1984
Glassdoor
Glassdoor: 4.0
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