Physical Design Engineer

NVIDIA
United States
Workplace: OnsiteFull timeUSD 116,000 - 189,750 annuallyFunction: Design (Product/UX/UI/Visual)Skills: ["Analytical","Problem-solving","Teamwork","Debugging"]

Lead end-to-end physical design and implementation for SOC devices in networking silicon, working on partition-level design, flow automation, floorplanning, power/clock distribution, P&R, and timing closure. You’ll RTL2GDS, perform trial synthesis, and optimize power/noise, leveraging CAD tools from Synopsys and Cadence, with Python/Perl scripting support, as part of NVIDIA’s networking silicon team.

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FursaFursa
NVIDIA
NVIDIA
6 months ago

Physical Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Lead end-to-end physical design and implementation for SOC devices in networking silicon, working on partition-level design, flow automation, floorplanning, power/clock distribution, P&R, and timing closure. You’ll RTL2GDS, perform trial synthesis, and optimize power/noise, leveraging CAD tools from Synopsys and Cadence, with Python/Perl scripting support, as part of NVIDIA’s networking silicon team.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Lead all aspects of physical design and implementation of SOC devices targeted at the networking markets.
  • •Work will be at the partition level.
  • •Participate in establishing physical design methodologies, flow automation, chip floorplan, power/clock distribution, chip assembly and P&R, timing closure.
  • •Daily work involves all aspects of physical chip development (RTL2GDS) – trial synthesis, power and clock distribution, place and route, timing closure, power and noise analysis and physical verification.
  • •NVIDIA is widely considered to be the leader of AI computing, and one of the technology world’s most desirable employers. We have some of the most forward-thinking and hardworking people in the world working for us. If you’re creative and autonomous, we want to hear from you

Pay and Benefits

Salary: USD 116,000 - 189,750 annually
Equity and Bonus:Equity
Perks:Equity

Key Requirements

  • •BSEE / MSEE or equivalent experience.
  • •3+ years of experience in VLSI physical design implementation on 5nm, 4nm and 3nm technology.
  • •Able to assist in design flow development and debugging, including application of ML/AI solutions.
  • •Already a validated strong power user of P&R, Timing Analysis, Physical Verification, IR Drop Analysis, CAD tools from Synopsys (ICC2/DC/PT/STAR/ICV), Cadence (Genus/Innovus/Tempus) and other major EDA companies.
  • •Confirmed prior experience in timing closure, clock/power distribution and analysis, RC extraction and correlation, place/ route and tapeout solutions.
Experience:SemiconductorsHardwareVLSIIC designNetworking
Skills:AnalyticalProblem-solvingTeamworkDebugging
Tech Stack:Synopsys ICC2DCPTSTARICVCadence GenusInnovusTempusPythonPerlTclMake

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
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