Sr. ASIC Design Verification Engineer (Silicon Engineering)

Develop and verify next-generation ASICs for Starlink’s space and ground infrastructure. Own digital ASIC verification at block and system level, writing and reviewing test plans, building test harnesses, running regressions, and driving code and functional coverage closure. Contribute to pre-silicon verification, chip bring-up, and post-silicon validation, working closely with cross-disciplinary teams to expand Starlink’s performance and capabilities.