Design Engineer

Cadence Design Systems
Shanghai
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 2+ yearsEducation: bachelorsSkills: ["Teamwork","Self-motivation","Communication"]

Design and implement custom integrated-circuit layouts, including floorplans, resistor/capacitor placement, and sensitive signal routing to reduce coupling and noise. Own top-level hierarchy floorplanning for blocks and power structures, and contribute to high-speed mixed-signal PHY layout work (e.g., SerDes, USB, DDR). Collaborate with analog circuit designers to deliver efficient, high-quality analog layouts while using DRC/LVS and EMIR analysis tools.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
Cadence Design Systems
Cadence Design Systems
1 month ago

Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 7 hours agoStatus: Live

Job Summary

Design and implement custom integrated-circuit layouts, including floorplans, resistor/capacitor placement, and sensitive signal routing to reduce coupling and noise. Own top-level hierarchy floorplanning for blocks and power structures, and contribute to high-speed mixed-signal PHY layout work (e.g., SerDes, USB, DDR). Collaborate with analog circuit designers to deliver efficient, high-quality analog layouts while using DRC/LVS and EMIR analysis tools.
Location: Shanghai
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Own custom layout floorplan work including matching guides, resistor/capacitor placement, noise/coupling reduction, and sensitive/mixed-signal routing.
  • •Develop custom layout top-level hierarchy floorplans for blocks and power structures.
  • •Perform layout work for high-speed mixed-signal PHY such as SerDes, USB, and DDR.
  • •Collaborate with the analog circuit design team to ensure efficient, high-quality analog layout design.

Key Requirements

  • •BSEE degree with 2+ years of experience in analog/custom layout for advanced technology nodes.
  • •Proficiency with layout edit/verify tools such as Virtuoso XL and Pegasus/Calibre DRC/LVS.
  • •Proficiency with EMIR tools such as Voltus-FI.
  • •Hands-on experience conducting DRC/LVS/ERC analysis and EMIR analysis with solution recommendations.
  • •Good teamwork, self-motivation, and communication skills in English.
Experience:2+ yearsIC designSemiconductorsAnalog layout
Education:Bachelor's
Skills:TeamworkSelf-motivationCommunication
Languages:English
Tech Stack:Virtuoso XLPegasusCalibreDRCLVSEMIRVoltus-FIDRC/LVS/ERCEMIR analysisSerDesUSBDDRFinFETPERC runESDLatch-up

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
Glassdoor
Glassdoor: 3.9
WebsiteLinkedInGlassdoor