Intel

1 day ago

Senior Physical Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 6 hours agoStatus: Live

Job Summary

Translate RTL to GDS for custom IP and SoC designs, creating manufacturing-ready design databases. Lead the physical design implementation workflow including synthesis, place and route, clock tree synthesis, floor planning, static timing, and power/clock distribution with reliability, power, and noise analysis. Drive verification and signoff such as formal equivalence, power integrity, layout checks, and electrical rule checking. Analyze results, recommend fixes, and help improve methodologies and flow automation.

Location: Bengaluru

Workplace: Hybrid

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Perform and lead physical design implementation of custom IP and SoC designs from RTL to GDS to produce manufacturing-ready design databases.
•Conduct physical design flow activities including synthesis, place and route, clock tree synthesis, floor planning, static timing, and power/clock distribution.
•Complete verification and signoff activities such as formal equivalence verification, static timing analysis, reliability verification, power integrity, layout verification, and electrical rule checking.
•Analyze design results and recommend fixes for violations affecting current and future product architecture.
•Optimize power, frequency, and area, and contribute to physical design methodology and flow automation improvements.

Key Requirements

•Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 10+ years of physical design execution experience.
•Master’s degree with 8+ years of physical design execution experience.
•Deep knowledge of RTL-to-GDS workflows including synthesis, place and route, and static timing analysis.
•Expertise in optimization techniques for power, performance, and area (PPA).
•Hands-on experience with industry-standard EDA tools for physical design and verification, including clock tree synthesis and low-power techniques.

Experience:10+ yearsASIC designSoC designCustom IPRTL-to-GDS

Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field

Skills:Critical thinkingProblem-solvingCross-functional collaborationCommunicationOrganizational abilities

Tech Stack:RTL-to-GDSSynthesisPlace and routeClock tree synthesisFloor planningStatic timing analysisPower/clock distributionPower and noise analysisFormal equivalence verificationPower integrityLayout verificationElectrical rule checkingStructural design checkingDFTMulti-power domain analysisLow-power designReliability verificationTiming closure

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

1 day ago

Senior Physical Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 6 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Hybrid

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Seniority: Mid level

Key Responsibilities

•Perform and lead physical design implementation of custom IP and SoC designs from RTL to GDS to produce manufacturing-ready design databases.
•Conduct physical design flow activities including synthesis, place and route, clock tree synthesis, floor planning, static timing, and power/clock distribution.
•Complete verification and signoff activities such as formal equivalence verification, static timing analysis, reliability verification, power integrity, layout verification, and electrical rule checking.
•Analyze design results and recommend fixes for violations affecting current and future product architecture.
•Optimize power, frequency, and area, and contribute to physical design methodology and flow automation improvements.

Key Requirements

•Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 10+ years of physical design execution experience.
•Master’s degree with 8+ years of physical design execution experience.
•Deep knowledge of RTL-to-GDS workflows including synthesis, place and route, and static timing analysis.
•Expertise in optimization techniques for power, performance, and area (PPA).
•Hands-on experience with industry-standard EDA tools for physical design and verification, including clock tree synthesis and low-power techniques.

Experience:10+ yearsASIC designSoC designCustom IPRTL-to-GDS

Education:Bachelor's in Electrical Engineering, Computer Engineering, or a related field

Skills:Critical thinkingProblem-solvingCross-functional collaborationCommunicationOrganizational abilities

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor