Senior/ Staff Design Automation Engineer, Scribe Layout Design Non-Array

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: QA, Test & Release EngineeringExperience: 5+ yearsEducation: mastersSkills: ["Growth mindset","Problem-solving","Attention to detail","Mentorship","Collaboration"]

Design and automate CMOS Scribe layout test structures for the SDNA team, contributing to physical layout, floorplanning, and verification (DRC and in-house tools). Build and improve automation flows by developing generative AI/LLM-based solutions and programmatic P-cell generators. Use SKILL/SKILL++ and scripting (Python, Perl, Tcl) to enhance layout automation, generate DUTs, and support CMOS design workflows while mentoring junior engineers across a global team.

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FursaFursa
Micron Technology
Micron Technology
4 days ago

Senior/ Staff Design Automation Engineer, Scribe Layout Design Non-Array

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Last checked: 1 hour agoStatus: Live

Job Summary

Design and automate CMOS Scribe layout test structures for the SDNA team, contributing to physical layout, floorplanning, and verification (DRC and in-house tools). Build and improve automation flows by developing generative AI/LLM-based solutions and programmatic P-cell generators. Use SKILL/SKILL++ and scripting (Python, Perl, Tcl) to enhance layout automation, generate DUTs, and support CMOS design workflows while mentoring junior engineers across a global team.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Sr. Manager level

Key Responsibilities

  • •Proactively identify problem areas and propose/develop innovative solutions to improve automation flows.
  • •Continuously evaluate and implement new tools and technologies to enhance layout automation.
  • •Contribute to physical layout, floorplanning, and verification through DRC and in-house verification tools.
  • •Develop intelligent, scalable automation solutions using Generative AI/AI Agents and LLM-based approaches.
  • •Provide guidance and mentorship to junior team members while working with global stakeholders.

Key Requirements

  • •Advanced understanding of EDA tools and CAD flows for layout automation and verification.
  • •Proficiency with Generative AI/AI Agents, MCP (Model Context Protocol), and LLM-based automation for scalable workflow improvements.
  • •Develop and enable programmatically defined P-cell (Parameterized layout generator) devices for CMOS modules.
  • •Implement scalable layout automation methodologies using SKILL/SKILL++ (Cadence) and improve design workflow.
  • •5+ years of relevant experience; Bachelor’s or Master’s degree in Computer Science, Computer Engineering, Electrical Engineering, or Electronics Engineering.
Experience:5+ yearsSemiconductorEDAComputer-aided designAutomation
Education:Master's in Computer Science, Computer Engineering, Electrical Engineering, or Electronics Engineering
Skills:Growth mindsetProblem-solvingAttention to detailMentorshipCollaboration
Tech Stack:EDA toolsCAD flowsGenerative AIAI AgentsMCP (Model Context Protocol)LLMsLLM-based automationSKILLSKILL++CadencePythonPerlTclLinuxP-cell (Parameterized layout generator)DRCFloorplanningPCELLCMOS process

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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Glassdoor: 3.7
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