IP Verification Engineer

AMD
Markham
Workplace: HybridFull timeCAD 135,800 - 232,800 annuallyFunction: QA, Test & Release EngineeringEducation: bachelorsSkills: ["Communication","Teamwork","Analytical skills","Problem-solving","Independent work"]

Work on a front-end design/integration verification team to validate next-generation FPGA and ASIC features for first-pass silicon success. Collaborate with architecture, IP design, PD, hardware, firmware, and product engineers to define verification scope, build test plans, and develop UVM-based testbenches and verification components. Create directed and random tests, run regressions, and debug failures to improve functional, performance, and implementation quality.

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FursaFursa
AMD
AMD
1 day ago

IP Verification Engineer

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live

Job Summary

Work on a front-end design/integration verification team to validate next-generation FPGA and ASIC features for first-pass silicon success. Collaborate with architecture, IP design, PD, hardware, firmware, and product engineers to define verification scope, build test plans, and develop UVM-based testbenches and verification components. Create directed and random tests, run regressions, and debug failures to improve functional, performance, and implementation quality.
Location: Markham
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering

Key Responsibilities

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand features to be verified.
  • •Develop test plan documentation accounting for interactions across features and use cases.
  • •Code IP/SoC level UVM-based testbenches and verification components (monitors, scoreboard, checkers).
  • •Build directed and random verification tests.
  • •Run regressions and debug test failures to ensure functional, performance, and implementation quality.

Pay and Benefits

Salary: CAD 135,800 - 232,800 annually

Key Requirements

  • •Passionate about complex IP architectures and digital design verification, with strong analytical and problem-solving skills.
  • •Develop test plan documentation covering interactions across hardware, firmware, and software driver use cases.
  • •Code IP/SoC-level UVM based testbenches and verification components such as monitors, scoreboards, and checkers.
  • •Build directed and random verification tests, and run regressions to ensure functional, performance, and implementation quality.
  • •Proficient in Verilog/SystemVerilog and object-oriented programming, plus scripting/automation for verification processes.
Experience:FPGAASICIP verification
Education:Bachelor's in computer engineering/electrical engineering
Skills:CommunicationTeamworkAnalytical skillsProblem-solvingIndependent work
Languages:English
Tech Stack:FPGAASICVerilogSystemVerilogUVMUVM-based verification frameworksPythonPerlPCIeCXLNVMeEthernetHLS

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn