Physical Design Engineer - Flow & Methodologies

Etched
San Jose
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsSkills: ["Debugging","Automation","Problem-solving","First-principles thinking"]

Architect and build an automated physical design methodology flow from RTL through place-and-route to signoff. Own end-to-end PD flow automation, CAD infrastructure, and tool version qualification, while driving dashboards for timing, physical verification, and utilization. Optimize power/performance/area through PPA tuning, establish timing correlation across signoff environments, and partner with design owners to debug flow issues and encode durable fixes into the methodology.

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FursaFursa
Etched
Etched
1 month ago

Physical Design Engineer - Flow & Methodologies

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Source: Company careers pageValidated by: Fursa AI
Last checked: 23 hours agoStatus: Live

Job Summary

Architect and build an automated physical design methodology flow from RTL through place-and-route to signoff. Own end-to-end PD flow automation, CAD infrastructure, and tool version qualification, while driving dashboards for timing, physical verification, and utilization. Optimize power/performance/area through PPA tuning, establish timing correlation across signoff environments, and partner with design owners to debug flow issues and encode durable fixes into the methodology.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Architect, build, and maintain automated RTL-to-GDSII flow from synthesis through place-and-route to signoff handoff.
  • •Automate PD flows end to end, including regression running, run management, and version control of flow configurations.
  • •Build and own CAD infrastructure supporting PD, including tool version qualification, deployment, and efficient compute/license usage.
  • •Drive dashboards for PD convergence across timing, physical verification, and utilization trends, and optimize tool flows with EDA vendors.
  • •Establish reference flows and QOR targets, audit third-party deliveries, and drive PG mesh creation, floorplanning signoff checks, PPA tuning, and timing correlation.

Pay and Benefits

Perks:Health InsuranceDentalVisionHousing SubsidyRelocation SupportWellness StipendMeal AllowanceUnlimited Compute

Key Requirements

  • •5-10+ years of experience with physical design (PD) or PD methodology/CAD.
  • •Experience building and owning automated RTL-to-GDSII flows used by multiple block owners.
  • •Experience creating block-level and full-chip PG mesh from scratch, including EM/IR analysis.
  • •Experience with DRC-clean floorplanning flows and automated checks.
  • •Experience with Cadence (Innovus, Genus) or Synopsys (Fusion Compiler) RTL-to-GDSII flows and related signoff integration.
Experience:5+ yearsEDA
Skills:DebuggingAutomationProblem-solvingFirst-principles thinking
Tech Stack:RTLGDSIITclPythonCadenceInnovusGenusSynopsysFusion CompilerPrimeTimeTempusVoltusPegasusCalibreUPFDRCPPA

Company Brief

Etched
Designs transformer‑specialized AI inference ASICs (product: Sohu) to accelerate large‑language‑model workloads, working with TSMC for fabrication and targeting energy‑efficient inference performance.
Industry: Hardware Devices
Company Size: Medium (51 to 250 employees)
Growth: Early Stage Startup
Valuation: Unicorn (USD 1B+)
Funding: Series A
Headquarters: San Jose, United States
Founded: 2022
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