Lead Digital Verification Engineer
Cadence Design Systems
Montreal, Ottawa, Toronto
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceEducation: bachelorsSkills: ["SystemVerilog","UVM","Python","Cadence","SVAs","Scripting","Debugging","Verification flow"]Lead verification engineer for digital RTL, developing reusable verification components and environments. You will contribute to flow development, test plan execution, functional and code coverage closures, and collaborate with design and verification teams across multiple locations (Montreal, Ottawa, Toronto) with travel ~5%.
