Silicon Design and Validation Engineer

Broadcom
San Jose
Workplace: OnsiteFull timeUSD 120,000 - 192,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 6+ yearsEducation: mastersSkills: ["Analytical thinking","Problem-solving","Attention to detail","Collaboration","Time management"]

Perform design, verification, and validation of analog and mixed-signal high-speed ASIC building blocks for data center networking. Collaborate with cross-functional teams to launch products, covering analog front-end circuits, TIA/PLL/VCO and clocking, bench test/debug, and characterization of control loops. Apply signal/power integrity measurements, test development and reporting, and work with Matlab or Python to support validation and correlation.

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FursaFursa
Broadcom
Broadcom
3 months ago

Silicon Design and Validation Engineer

✓ Verified Job

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Source: Company careers pageValidated by: Fursa AI
Last checked: 21 hours agoStatus: Live

Job Summary

Perform design, verification, and validation of analog and mixed-signal high-speed ASIC building blocks for data center networking. Collaborate with cross-functional teams to launch products, covering analog front-end circuits, TIA/PLL/VCO and clocking, bench test/debug, and characterization of control loops. Apply signal/power integrity measurements, test development and reporting, and work with Matlab or Python to support validation and correlation.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Perform analog and mixed-signal high-speed design, verification, and validation activities for ASIC building blocks.
  • •Collaborate with cross-functional teams to launch ASIC products for data center networking.
  • •Validate and characterize control loops (e.g., PLLs and LDOs) and conduct timing/clock generation verification.
  • •Use bench test/debug and measurement equipment to debug and correlate signal/power integrity for high-speed designs.
  • •Develop test/validation reporting and recommend workarounds for design bugs.

Pay and Benefits

Salary: USD 120,000 - 192,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVision401kPaid HolidaysPaid LeaveEspp

Key Requirements

  • •M.Sc. or PhD in Electrical Engineering or Computer Engineering with 6+ years of experience in analog and mixed-signal IP design, verification, and validation for high-speed data converters and SerDes.
  • •Experience with design, validation, and verification of analog front-end circuits, including Trans-Impedance Amplifiers (TIA), PLLs, VCOs, and clocking circuitry.
  • •Knowledge of development methodologies and design flows, including EDA integration and foundry PDKs with associated collaterals.
  • •Experience with bench test debug and validation for clock generation and timing IPs, data converters, TIAs, modulator drivers, and CDR/SerDes.
  • •Ability to work with Matlab or Python and to assess design bugs, recommend workarounds, and use measurement equipment for correlation and debugging.
Experience:6+ yearsASICData center networkingAnalog and mixed-signalHigh-speed SerDesOptical I/O
Education:Master's in Electrical Engineering or Computer Engineering
Skills:Analytical thinkingProblem-solvingAttention to detailCollaborationTime management
Tech Stack:MatlabPythonEDAPDKIEEEASICSerDesCDRPLLVCOTIALDOClocking circuitry

Company Brief

Broadcom
Designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions for the data center, networking, broadband, wireless, storage, and industrial markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Irvine, United States
Founded: 1991
WebsiteLinkedIn