Staff Engineer, IP Dev Layout

Micron Technology
Hyderabad
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 8-15 yearsEducation: bachelorsSkills: ["Leadership","Problem-solving","Verbal communication","Written communication","Proactive learning"]

Design and develop critical analog, mixed-signal, custom digital block, and full-chip integration support for IP development. Own layout verification (LVS/DRC/Antenna), quality checks, documentation, and on-time delivery of block-level layouts. Drive planning, area/time estimation, scheduling, and execution across multiple projects, while communicating effectively with global engineering teams. Support tape-outs and proactively use AI tools in daily workflows.

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FursaFursa
Micron Technology
Micron Technology
1 week ago

Staff Engineer, IP Dev Layout

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live
Reposted: similar role first listed 1 day ago

Job Summary

Design and develop critical analog, mixed-signal, custom digital block, and full-chip integration support for IP development. Own layout verification (LVS/DRC/Antenna), quality checks, documentation, and on-time delivery of block-level layouts. Drive planning, area/time estimation, scheduling, and execution across multiple projects, while communicating effectively with global engineering teams. Support tape-outs and proactively use AI tools in daily workflows.
Location: Hyderabad
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Design and develop analog, mixed-signal, custom digital block, and full-chip integration support.
  • •Perform layout verification including LVS/DRC/Antenna, quality checks, and support documentation.
  • •Deliver on-time, high-quality block-level layouts and demonstrate leadership in planning and execution.
  • •Conduct physical verification troubleshooting for custom layout.
  • •Coordinate scheduling, area/time estimation, and communicate status and needs with global engineering teams.

Key Requirements

  • •8 to 15 years of experience in analog/custom layout build in advanced CMOS processes across multiple technology nodes (Planar, FinFET).
  • •Hands-on expertise with Cadence VLE/VXL and Mentor Graphics Calibre for DRC/LVS verification.
  • •Experience creating layouts for critical blocks such as Temperature sensor, PLL, ADC, DAC, LDO, Bandgap, reference generators, Charge Pump, Current Mirrors, Comparator, and Differential Amplifier.
  • •Strong analog layout fundamentals including matching, electro-migration, latch-up, coupling/crosstalk, IR-drop, and static parasitics.
  • •Excellent communication skills and proactive use of AI-related tools in day-to-day tasks.
Experience:8-15 years
Education:Bachelor's in Electronic/VLSI Engineering
Skills:LeadershipProblem-solvingVerbal communicationWritten communicationProactive learning
Tech Stack:Cadence VLECadence VXLMentor Graphics CalibreDRCLVSAntennaCMOSPlanarFinFETAI tools

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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