Verification Engineer, PCIE

NVIDIA
Bengaluru
Workplace: HybridFull timeFunction: QA, Test & Release EngineeringExperience: 1+ yearsEducation: mastersSkills: ["Debugging","Analytical skills","Interpersonal skills","Teamwork"]

Verify the design and implementation of next-generation PCI Express controllers for NVIDIA GPUs and SoCs. Own verification across ASIC/IP/sub-system levels, developing verification scope, test plans, tests, and verification infrastructure using methodologies like UVM. Build reusable bus functional models, monitors, checkers, and scoreboards with coverage-driven constrained-random verification. Collaborate with architects, designers, and pre/post-silicon verification teams to ensure correctness and debug issues.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
NVIDIA
NVIDIA
3 days ago

Verification Engineer, PCIE

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 15 hours agoStatus: Live
Reposted: similar role first listed 5 months ago

Job Summary

Verify the design and implementation of next-generation PCI Express controllers for NVIDIA GPUs and SoCs. Own verification across ASIC/IP/sub-system levels, developing verification scope, test plans, tests, and verification infrastructure using methodologies like UVM. Build reusable bus functional models, monitors, checkers, and scoreboards with coverage-driven constrained-random verification. Collaborate with architects, designers, and pre/post-silicon verification teams to ensure correctness and debug issues.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering
Seniority: Mid level

Key Responsibilities

  • •Verify ASIC design, architecture, golden models, and micro-architecture of PCIe controllers at IP/sub-system levels using modern verification methodologies such as UVM.
  • •Develop reusable bus functional models, monitors, checkers, and scoreboards using coverage-driven verification and constrained-random techniques.
  • •Understand design specifications and define verification scope, test plans, tests, and verification infrastructure to verify correctness.
  • •Create and maintain functional coverage-based verification environments to drive coverage toward verification goals.
  • •Collaborate with architects, designers, and pre and post silicon verification teams to complete verification tasks and resolve issues.

Key Requirements

  • •B.Tech./M.Tech or equivalent experience.
  • •1+ years of relevant experience.
  • •Experience in verification at unit/sub-system/SoC level and expertise in Verilog and SystemVerilog.
  • •Expertise in comprehensive verification of IP or interconnect protocols (e.g., PCI Express, USB, SATA).
  • •Experience developing functional coverage-based constrained random verification environments and DV methodologies like UVM/VMM with standard simulation/debug tools.
Experience:1+ yearsASIC verificationSoCHardware design verificationInterconnect protocols
Education:Master's
Skills:DebuggingAnalytical skillsInterpersonal skillsTeamwork
Tech Stack:PCI ExpressPCIeCXLVerilogSystemVerilogUVMVMMConstrained random verificationFunctional coverageUVM/VMMASIC verificationSimulationDebugGolden modelsBus functional modelsMonitorsCheckersScoreboardsPerlPython

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
Glassdoor: 4.3
WebsiteLinkedInGlassdoor