Senior Engineer IP Verification - Digital Design Verification

Micron Technology
Hyderabad, Telangana, India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 4-6 yearsEducation: bachelorsSkills: ["Communication","Debugging","Teamwork","Stakeholder communication","Proactive learning","Risk communication"]

Own block/chip RTL verification for DRAM architectures by defining verification scope, strategy, and plans. Build and maintain SV-UVM verification testbenches and test vectors, run directed and constrained-random regressions, and triage failures. Measure functional/code coverage, identify verification holes, and debug RTL, testbench, and environment issues. Partner with design engineers and international teams to improve verification flows and communicate readiness risks to stakeholders.

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FursaFursa
Micron Technology
Micron Technology
19 hours ago

Senior Engineer IP Verification - Digital Design Verification

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 9 hours agoStatus: Live

Job Summary

Own block/chip RTL verification for DRAM architectures by defining verification scope, strategy, and plans. Build and maintain SV-UVM verification testbenches and test vectors, run directed and constrained-random regressions, and triage failures. Measure functional/code coverage, identify verification holes, and debug RTL, testbench, and environment issues. Partner with design engineers and international teams to improve verification flows and communicate readiness risks to stakeholders.
Location: Hyderabad, Telangana, India
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Define verification scope, strategy, and plans for block/chip RTL verification based on design specifications.
  • •Develop, execute, and maintain verification testbenches and test vectors using SV-UVM and digital simulation tools.
  • •Run directed and constrained-random tests and regressions; analyze results and triage failures.
  • •Close verification metrics (functional/code coverage as applicable) and identify verification holes to support tapeout readiness.
  • •Provide verification status and summaries to stakeholders, and debug RTL/testbench/environment issues in partnership with design engineers to prevent recurrence.

Pay and Benefits

Perks:Paid LeaveHealth InsuranceContinuous LearningWellness Stipend

Key Requirements

  • •Bachelor’s with 4–6 years of experience or a Post Graduate Degree in Electronics Engineering (or related engineering) with 2–4 years of experience.
  • •Good understanding of digital circuits and experience in RTL verification, including building SV/UVM testbenches at block level.
  • •Experience running directed and constrained-random tests and regressions, analyzing results, and triaging failures.
  • •Proficiency with verification tools such as Virtuoso, Xcellium, Simvision, and Verdi/Verisium.
  • •Strong scripting skills using Perl and Python, plus good communication and debugging ability to work in a team.
Experience:4-6 yearsDRAMSemiconductorsMemoryDigital design verification
Education:Bachelor's in Electronics Engineering
Skills:CommunicationDebuggingTeamworkStakeholder communicationProactive learningRisk communication
Tech Stack:SVUVMDigital simulationVirtuosoXcelliumSimvisionVerdiVerisiumPerlPythonRTL verification

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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