DFT Engineer

AMD
Austin
Workplace: HybridFull timeUSD 122,220 - 209,520 annuallyFunction: QA, Test & Release EngineeringEducation: mastersSkills: ["Collaboration","Clear communication","Ownership","Problem-solving","Adaptability"]

Define, design, and verify robust Design for Test (DFT) and Design for Debug (DFD) solutions for complex, high-performance SoCs. Partner with architects, RTL, firmware, and verification teams to integrate DFX logic, build directed and random verification tests, and debug failures to root cause. Create test plan documentation, estimate test effort and test environment changes, and track functional and code coverage to meet requirements.

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FursaFursa
AMD
AMD
3 days ago

DFT Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 3 hours agoStatus: Live

Job Summary

Define, design, and verify robust Design for Test (DFT) and Design for Debug (DFD) solutions for complex, high-performance SoCs. Partner with architects, RTL, firmware, and verification teams to integrate DFX logic, build directed and random verification tests, and debug failures to root cause. Create test plan documentation, estimate test effort and test environment changes, and track functional and code coverage to meet requirements.
Location: Austin
Workplace: Hybrid
Employment Type: Full time
Job Function: QA, Test & Release Engineering

Key Responsibilities

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand and verify new DFX features.
  • •Design and integrate DFX logic in complex SoCs.
  • •Create test plan documentation covering interactions across features, hardware, firmware, and software driver use cases.
  • •Build directed and random verification tests and estimate effort and test environment changes.
  • •Debug test failures, identify root causes, and improve functional/code coverage by modifying or adding tests as needed.

Pay and Benefits

Salary: USD 122,220 - 209,520 annually

Key Requirements

  • •Experience with DFT and DFD architecture, design, and verification for SoCs/ASICs.
  • •Hands-on experience with JTAG, LBIST, MBIST, Scan, and ATPG.
  • •Familiarity with Tessent tools (Scan and ATPG) and test pattern generation and debug on ATE.
  • •Experience with IP-level and ASIC verification, including post-silicon bring-up.
  • •Proficiency with Verilog, SystemVerilog, SystemC, and C++, including UVM concepts and SystemVerilog.
Experience:SoCASIC verificationPost-silicon bring-upSemiconductors
Education:Master's in Electrical Engineering, Computer Engineering, or a related field
Skills:CollaborationClear communicationOwnershipProblem-solvingAdaptability
Tech Stack:DFTDFDJTAGLBISTMBISTScanATPGTessentATEVerilogSystemVerilogSystemCC++UVMStatic timing analysisICLPDLPerlRubyMakefile

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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