Senior RTL design engineer - SOC Intergration
AMD
Hyderabad
Workplace: OnsiteFull timeINR 3,235,890 - 4,622,700 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 6+ yearsEducation: bachelorsSkills: ["Communication","Teamwork","Problem-solving"]Lead RTL Design Engineer responsible for advanced digital design and verification of silicon blocks in sub-20nm technology. You’ll drive ASIC design flows, develop Verilog/SystemVerilog RTL, and use PrimeTime, Spyglass, and Cadence tools. Collaborate with global teams across sites/time zones to deliver high-quality, industry-leading AMD silicon for AI/data center, PC, and embedded systems.

