PDK Engineer Extraction Development

Intel
Bengaluru
Workplace: HybridFull timeFunction: Product ManagementExperience: 8+ yearsSkills: ["Organizational skills","Presentation skills","Communication skills","Detail-oriented","Collaboration"]

Develop and maintain Process Design Kit (PDK) collateral that enables high-quality silicon design, including parasitic extraction, physical verification decks, runsets, and transistor/device modeling for advanced technology nodes. Validate PDK libraries against design rules, build simulation and verification test structures, and troubleshoot PDK-related issues through debugging and root-cause analysis. Partner with EDA vendors and cross-functional teams, automate workflows, and document design flows, guidelines, and tutorials for internal and external design communities.

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FursaFursa
Intel
Intel
22 hours ago

PDK Engineer Extraction Development

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Last checked: 4 hours agoStatus: Live

Job Summary

Develop and maintain Process Design Kit (PDK) collateral that enables high-quality silicon design, including parasitic extraction, physical verification decks, runsets, and transistor/device modeling for advanced technology nodes. Validate PDK libraries against design rules, build simulation and verification test structures, and troubleshoot PDK-related issues through debugging and root-cause analysis. Partner with EDA vendors and cross-functional teams, automate workflows, and document design flows, guidelines, and tutorials for internal and external design communities.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Product Management
Seniority: Mid level

Key Responsibilities

  • •Develop and maintain PDK collateral, including Metal R and C extraction, runsets, LVS, physical design verification decks, and transistor modeling for silicon designers.
  • •Validate PDK libraries for compliance with design rules and correct implementations for advanced process nodes.
  • •Build test structures and support simulation for physical verification, parasitic extraction, and device modeling.
  • •Collaborate with stakeholders to resolve PDK issues through debugging, root cause analysis, and error dispositioning.
  • •Partner with EDA vendors and cross-functional teams to enable new tool functionality, improve workflows, and document design flows, guidelines, and tutorials.

Key Requirements

  • •Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field with 12+ years of experience; OR Master’s with 10+ years; OR Ph.D. with 8+ years in PDK development and validation.
  • •Hands-on expertise with physical verification tools (Calibre, Pegasus, or ICV) and parasitic extraction tools (StarRC or QRC).
  • •Proficiency in scripting languages such as Python, TCL, or PERL to automate workflows and improve scalability.
  • •Experience enabling PDKs for advanced process nodes, including device modeling and layout verification methodologies.
  • •Preferred: familiarity with reliability verification (EM/IR flows and ESD concepts) and CMOS device physics/design rules.
Experience:8+ yearsPDK developmentPhysical verificationParasitic extractionEDA vendorsSemiconductor designAdvanced process nodesDevice modeling
Skills:Organizational skillsPresentation skillsCommunication skillsDetail-orientedCollaboration
Tech Stack:PDKMetal R and C extractionLVSPhysical design verificationCalibrePegasusICVStarRCQRCPythonTCLPERLAutomationQA methodologiesEM/IRESDCMOSCMOS device physics3DIC flowLow-power techniques

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
Glassdoor
Glassdoor: 3.8
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