CPU Core Architecture/RTL Engineer

AMD
United States
Workplace: OnsiteFull timeUSD 175,000 - 300,000 annuallyFunction: Architecture & Urban PlanningEducation: mastersSkills: ["Critical thinking","Communication","Collaboration","Problem-solving","Debugging"]

Design and develop RTL for AMD’s next-generation CPU core pipeline and related logic. Collaborate with hardware and software engineers to define high-level architecture and microarchitecture for high-performance processor cores. Contribute across verification, synthesis, power reduction, timing convergence, and floorplanning, from clean-sheet concepts through tapeout and post-silicon debug. Lead designer teams, supervise junior engineers, and improve design methodology.

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FursaFursa
AMD
AMD
1 week ago

CPU Core Architecture/RTL Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Design and develop RTL for AMD’s next-generation CPU core pipeline and related logic. Collaborate with hardware and software engineers to define high-level architecture and microarchitecture for high-performance processor cores. Contribute across verification, synthesis, power reduction, timing convergence, and floorplanning, from clean-sheet concepts through tapeout and post-silicon debug. Lead designer teams, supervise junior engineers, and improve design methodology.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Architecture & Urban Planning
Seniority: Mid level

Key Responsibilities

  • •Execute RTL design and coding for sections of the processor core pipeline and related logic.
  • •Collaborate with hardware and software engineers to define high-level architecture.
  • •Participate in defining microarchitecture for next-generation high-performance processor cores.
  • •Contribute to design verification, synthesis, power reduction, timing convergence, and floorplan efforts.
  • •Lead teams of designers, supervise junior engineers, and drive methodology improvements.

Pay and Benefits

Salary: USD 175,000 - 300,000 annually

Key Requirements

  • •Verilog RTL development for CPUs, SoCs, or ASIC environments using industry tools.
  • •Expertise in processor architecture and logic design, including RTL coding for high-speed processors.
  • •Experience with power-saving techniques and physical design/verification methods (synthesis, place and route, timing closure concepts).
  • •Ability to support development from clean-sheet design through product tapeout and post-silicon debug.
  • •Comfort with ASIC implementation topics such as synthesis flow, static timing analysis, and DFT/DFD logic; scripting experience with Perl, Shell, and Tcl is a plus.
Education:Master's in Electrical Engineering, Computer Engineering, or Computer Science (computer architecture focus)
Skills:Critical thinkingCommunicationCollaborationProblem-solvingDebugging
Tech Stack:VerilogRTLASICSoCMicroarchitectureSynthesisPlace and routeTiming closureFloorplanStatic timing analysisDFTDFDClockingResetPower managementX86ARMPerlShellTcl

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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Glassdoor: 3.9
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