Senior FPGA / RTL Design Engineer - Signal Processing
Motorola Solutions
Los Angeles, Irvine
Workplace: HybridFull timeUSD 125,000 - 195,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 6+ yearsEducation: bachelorsSkills: ["MATLAB","Vivado","Xilinx FPGAs","RTL","DSP","Fixed-point","Clock-domain"]Senior FPGA design engineer focused on signal processing for Silvus’ MIMO wireless systems. Lead digital design, RTL coding, and FPGA timing closure in a hybrid LA-based role, collaborating with RF and software teams on FPGA-based R&D and field deployments. Requires strong fixed-point DSP, Xilinx Vivado experience, and U.S. eligibility for federal contracts.
