Lead Support Application Engineer - GCS

Cadence Design Systems
Bengaluru, Noida
Workplace: HybridFull timeFunction: Administration & Executive AssistanceExperience: 5-7 yearsEducation: bachelorsSkills: ["Debugging","Verilog","VHDL","SystemVerilog","Python","TCL","Perl","Digital design","DC/PDN analysis"]

Lead Application Engineer in Cadence’s GCS team provides post-sales technical consultation for IC level Power System analysis tools, debugging complex issues, guiding design methodologies, and contributing knowledge content. Works with global customers across Bangalore and Noida, collaborating with product teams to prioritize improvements and solution strategies while leveraging Cadence toolflows to enable customers’ design cycles.

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Cadence Design Systems
Cadence Design Systems
7 months ago

Lead Support Application Engineer - GCS

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Source: Company careers pageValidated by: Fursa AI
Last checked: 15 hours agoStatus: Live

Job Summary

Lead Application Engineer in Cadence’s GCS team provides post-sales technical consultation for IC level Power System analysis tools, debugging complex issues, guiding design methodologies, and contributing knowledge content. Works with global customers across Bangalore and Noida, collaborating with product teams to prioritize improvements and solution strategies while leveraging Cadence toolflows to enable customers’ design cycles.
Location: Bengaluru, Noida
Workplace: Hybrid
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Provide technical support for Voltus product from the Multiphysics System Analysis toolset with focus on productivity and customer satisfaction
  • •Support multiple tools/methods for customers requiring general domain knowledge and developing business experience
  • •Assist in creation of high quality and impactful knowledge content in the MSA domain
  • •Work independently at Cadence or customer facilities to deliver results according to schedule
  • •Handle problems of moderate scope that may require analysis of situations, data or tool problems

Key Requirements

  • •Bachelor’s Degree in Electrical / Electronics / Electronics and Communication / VLSI Engineering with 5-7 years related experience
  • •OR Masters with 3-4 years of related experience
  • •OR PhD with 1 years of related experience
  • •3-7 years relevant industry experience in EMIR analysis, PDN analysis with digital signoff tools and Digital Physical implementation as designer or methodology/flow expert
  • •Strong debugging skills and ability to separate critical issues from trivial ones
Experience:5-7 yearsSemiconductorsHardware designEDA
Education:Bachelor's in Electrical / Electronics / Electronics and Communication / VLSI Engineering
Skills:DebuggingVerilogVHDLSystemVerilogPythonTCLPerlDigital designDC/PDN analysis
Languages:English
Tech Stack:VerilogVHDLSystemVerilogTCLPerlPythonCadence GenusCadence InnovusCadence TempusCadence Conformal

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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