PCIe, CXL and Highspeed IO Validation Engineer

Develop and execute feature enablement and validation test plans for SoC and system-level SoC features across AMD Server products focused on high-speed IO (PCIe, CXL, multi-socket and inter-die interfaces). Build post-silicon validation infrastructure spanning software, hardware, automation, and lab setup, then test feature interactions, perform root-cause analysis, and collaborate cross-functionally to improve validation strategy, methodology, and process. Debug at SoC and system levels and drive tool development to enhance validation and debugging.