Ingénieur Vérification Asic R&D (F/H) (Les Clayes-sous-Bois, FR)

Atos
France
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringSkills: ["Communication","Teamwork","Problem-solving","Verbal communication","Written communication"]

Role focused on verification of complex ASICs/SoCs (network router, cache coherence controllers, high‑end server processors) using functional verification methodologies (Constraint‑Random, Coverage Driven) and UVM-based environments. You will develop verification plans, write specs, build test environments in SystemVerilog/C++, and analyze simulation results to reach coverage targets within tight deadlines.

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Atos
Atos
6 months ago

Ingénieur Vérification Asic R&D (F/H) (Les Clayes-sous-Bois, FR)

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Last checked: 3 hours agoStatus: Live

Job Summary

Role focused on verification of complex ASICs/SoCs (network router, cache coherence controllers, high‑end server processors) using functional verification methodologies (Constraint‑Random, Coverage Driven) and UVM-based environments. You will develop verification plans, write specs, build test environments in SystemVerilog/C++, and analyze simulation results to reach coverage targets within tight deadlines.
Location: France
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering

Key Responsibilities

  • •Acquire knowledge of ASIC architecture and microarchitecture by studying specifications and interacting with architecture and logic design teams.
  • •Draft verification specifications and create verification plans in close collaboration with the logic design team.
  • •Develop verification environments (UVM-SystemVerilog/C++) including tests and coverage models.
  • •Follow, analyze and debug simulation errors to ensure timely delivery of verification results.
  • •Monitor and analyze simulation coverage results to improve tests and achieve coverage goals within deadlines.

Pay and Benefits

Perks:MutuelleFormation

Key Requirements

  • •Concrete experience in verification of SoC/ASIC and IPs
  • •Experience with Verification using UVM methodology
  • •Experience developing environments for verification using Constraint-Random/Coverage-Driven approaches in SystemVerilog/C++ (drivers/monitors, constrained random tests, auto-checkers, coverage models)
  • •Knowledge of simulation and coverage tracking tools
  • •Strong problem solving and debugging skills with ability to propose fixes or workarounds
Experience:SemiconductorsASICSoCR&D
Skills:CommunicationTeamworkProblem-solvingVerbal communicationWritten communication
Languages:FrenchEnglish
Tech Stack:SystemVerilogUVMC++VerilogSimulation toolsCoverage tools

Company Brief

Atos
Global digital services and consulting firm delivering cloud, cybersecurity, big data, digital workplace, and managed services to enterprise and public sector clients. Provides IT transformation, systems integration, and outsourcing solutions worldwide.
Industry: Consulting
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Bezons, France
Founded: 1997
WebsiteLinkedIn