Sr. Silicon Design Engineer

AMD
San Jose
Workplace: OnsiteFull timeUSD 124,040 - 212,640 annuallyFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Limited judgment","Problem analysis","Cross-functional collaboration"]

Research, design, develop, and verify electronic components and systems for semiconductor manufacturing. Own ASIC/SOC definition, design, verification, and documentation, including architecture, logic design, and simulation. Build UVM-based verification environments with constrained-random verification in SystemVerilog, validate IPs using protocols like PCIe and AXI, and collaborate on functional coverage closure and code coverage. Improve productivity with Python scripts and use ASIC design tools in Unix/Linux environments.

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FursaFursa
AMD
AMD
3 days ago

Sr. Silicon Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live
Reposted: similar role first listed 3 months ago

Job Summary

Research, design, develop, and verify electronic components and systems for semiconductor manufacturing. Own ASIC/SOC definition, design, verification, and documentation, including architecture, logic design, and simulation. Build UVM-based verification environments with constrained-random verification in SystemVerilog, validate IPs using protocols like PCIe and AXI, and collaborate on functional coverage closure and code coverage. Improve productivity with Python scripts and use ASIC design tools in Unix/Linux environments.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Research, design, develop, and/or test electronic components and systems for semiconductor and related device manufacturing.
  • •Perform definition, design, verification, and/or documentation for ASIC and SOC development.
  • •Determine architecture design, logic design, and/or system simulation, and architect UVM verification environments and SOC/IP test benches.
  • •Verify IPs involving complex protocols such as PCIe and AXI, and work with design teams on code coverage and functional coverage closure.
  • •Use scripts in Python for productivity enhancements and define module interfaces/formats for simulation.

Pay and Benefits

Salary: USD 124,040 - 212,640 annually

Key Requirements

  • •Master’s degree (or foreign equivalent) in Computer Engineering, Electrical Engineering, Electronics Engineering, Electrical and Computer Engineering, or related field.
  • •Experience in hardware verification.
  • •Experience in logic and circuit design, including Verilog/VHDL and SystemVerilog.
  • •Experience with functional verification of microprocessors and design flows/methodologies for chip verification.
  • •Experience using ASIC design tools (e.g., synthesis, simulation, equivalence checking, static timing analysis) and UVM verification for SOC/IP test benches.
Education:Master's
Skills:Limited judgmentProblem analysisCross-functional collaboration
Languages:En-us
Tech Stack:ASICSOCElectronicsVerilogVHDLSystemVerilogUVMPCIeAXIPythonUnix/LinuxEDA toolsSynthesisSimulationEquivalence checkingStatic timing analysisFront-end EDA

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
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