PD Layout expert

Texas Instruments
Bengaluru
Workplace: OnsiteFull timeFunction: OtherExperience: 5+ yearsEducation: bachelorsSkills: []

Own physical design execution for SoCs in high-growth MCU domains, focusing on floorplanning, congestion and DRC analysis, and layout closure. Drive power-grid and IR drop validation for balanced utilization, collaborate with timing/ATD/ESD and physical verification teams to protect design intent, and lead ECO implementation for DRC/LVS fixes. Use advanced EDA workflows (e.g., Innovus) and automation scripting (TCL/Perl/Python) to enable correct-by-construction flows and explore AI/ML-assisted improvements.

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FursaFursa
Texas Instruments
Texas Instruments
3 months ago

PD Layout expert

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Own physical design execution for SoCs in high-growth MCU domains, focusing on floorplanning, congestion and DRC analysis, and layout closure. Drive power-grid and IR drop validation for balanced utilization, collaborate with timing/ATD/ESD and physical verification teams to protect design intent, and lead ECO implementation for DRC/LVS fixes. Use advanced EDA workflows (e.g., Innovus) and automation scripting (TCL/Perl/Python) to enable correct-by-construction flows and explore AI/ML-assisted improvements.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Seniority: Mid level

Key Responsibilities

  • •Perform PD execution including floorplanning, congestion analysis, and DRC-related work to enable layout success.
  • •Drive layout closure and establish correlation with signoff in Innovus.
  • •Lead SoC layout (FP) and power-grid/IR drop validation and closure to ensure balanced design utilization.
  • •Coordinate with timing, ATD, ESD, and physical verification teams to preserve design intent.
  • •Drive ECO implementation for DRC/LVS fixes and apply correct-by-construction approaches (e.g., early DRC/LVS, NDRs) using advanced EDA methodologies.

Key Requirements

  • •5+ years of relevant experience in physical design.
  • •Strong understanding of physical design fundamentals including floorplan, congestion analysis, and DRC.
  • •Experience driving layout closure in Innovus and correlating results with signoff.
  • •Ability to drive SoC layout (FP), power-grid design, and IR drop validation/closure for balanced utilization.
  • •Scripting skills in TCL, Perl, or Python for flow automation.
Experience:5+ years
Education:Bachelor's
Tech Stack:InnovusTCLPerlPython

Company Brief

Texas Instruments
Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Dallas, United States
Founded: 1930
WebsiteLinkedIn