RFIC Layout Designer (RFIC Engineering)

SpaceX
Irvine, Redmond
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 1+ yearsEducation: bachelorsSkills: ["Communication","Independent work","Proactive"]

Lead RFIC and mixed-signal IC layout for multiple silicon projects supporting Starlink’s space and ground infrastructure. Partner with IC designers and chip leads to define floorplans, power/ground distribution, and pad placement, then execute custom RF/analog block layout with matching and minimized parasitics. Perform DRC/LVS and layout-vs-schematic signoff, integrate top-level layouts with ESD structures, and support tape-out workflows (including GDS handoff).

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FursaFursa
SpaceX
SpaceX
1 month ago

RFIC Layout Designer (RFIC Engineering)

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Last checked: 4 hours agoStatus: Live

Job Summary

Lead RFIC and mixed-signal IC layout for multiple silicon projects supporting Starlink’s space and ground infrastructure. Partner with IC designers and chip leads to define floorplans, power/ground distribution, and pad placement, then execute custom RF/analog block layout with matching and minimized parasitics. Perform DRC/LVS and layout-vs-schematic signoff, integrate top-level layouts with ESD structures, and support tape-out workflows (including GDS handoff).
Location: Irvine, Redmond
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Partner with IC designers and chip leads to determine chip floorplan, including power/ground distribution strategy and pad locations with packaging engineers.
  • •Estimate layout schedule and identify areas of complexity needing early investigation.
  • •Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance.
  • •Run DRC/erc and layout-vs-schematic checks, resolve errors, and complete top-level integration with ESD structures.
  • •Support tape-out activities (density fill, design-for-manufacturability checks, and sharing GDS with the foundry) and trial new EDA tools; create guides/demos for layout technique improvements.

Key Requirements

  • •Bachelor’s degree in electrical or computer engineering and 1+ years of professional experience as an IC layout designer; or 3+ years of IC layout experience in lieu of a degree.
  • •Strong analog layout skills and experience with advanced node IC layouts such as 22nm, 16nm, 7nm, 5nm or below.
  • •Experience performing design rule checking (DRC), electrical rule checking (ERC), and layout-vs-schematic checks and resolving errors.
  • •Experience laying out circuits for frequencies up to 50GHz and sensitive RF blocks such as low noise amplifiers, voltage controlled oscillators, and mixers.
  • •Working knowledge of Linux and experience with shell scripting (Perl, Python or similar) and/or managing revision control systems.
Experience:1+ years
Education:Bachelor's
Skills:CommunicationIndependent workProactive
Tech Stack:LinuxPerlPythonShell scriptingEDA toolsGDSRevision control

Eligibility

Nationality:US National

Company Brief

SpaceX
Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Growth: Established Company
Valuation: Hectocorn (USD 100B+)
Funding: Series E+
Headquarters: Hawthorne, United States
Founded: 2002
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