RFIC Layout Designer (RFIC Engineering)

SpaceX
Irvine, Palo Alto, Redmond
Workplace: OnsiteFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 1+ yearsEducation: bachelorsSkills: ["Communication","Independently","Problem-solving"]

Design and integrate full-chip layouts for custom analog and RFICs for Starlink, partnering with IC designers and chip leads to set floorplans, pad locations, power/ground distribution, and ESD structures. Perform RF/analog block layout, run design/electrical/versus-schematic checks, resolve errors, and drive top-level integration through tape out (including DFM and GDS delivery). Trial EDA tool improvements and help the team by sharing layout technique improvements.

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FursaFursa
SpaceX
SpaceX
1 month ago

RFIC Layout Designer (RFIC Engineering)

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Source: Company careers pageValidated by: Fursa AI
Last checked: 16 hours agoStatus: Live

Job Summary

Design and integrate full-chip layouts for custom analog and RFICs for Starlink, partnering with IC designers and chip leads to set floorplans, pad locations, power/ground distribution, and ESD structures. Perform RF/analog block layout, run design/electrical/versus-schematic checks, resolve errors, and drive top-level integration through tape out (including DFM and GDS delivery). Trial EDA tool improvements and help the team by sharing layout technique improvements.
Location: Irvine, Palo Alto, Redmond
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Work with integrated circuit designers and chip leads to determine the chip floor plan, including power/ground distribution and pad locations with packaging engineers.
  • •Estimate the schedule for layout work and identify areas of complexity requiring early investigation.
  • •Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance.
  • •Perform design rule checking, electrical rule checking, layout-versus-schematic checks, and resolve errors.
  • •Perform top-level layout integration with electrostatic discharge structures and pad assembly through final tape out (including density fill, DFM checks, and GDS sharing).

Key Requirements

  • •Bachelor’s degree in electrical or computer engineering plus 1+ years of professional experience as an IC layout designer, OR 3+ years of IC layout experience in lieu of a degree.
  • •Perform layout of custom RF and analog circuit blocks with attention to matching and minimizing parasitic capacitance.
  • •Conduct design rule checking, electrical rule checking, and layout-versus-schematic checks and resolve errors.
  • •Execute top-level layout integration including ESD structures and pad assembly, and support final tape out (including density fill and DFM checks).
  • •Work independently on challenging problems and communicate effectively (oral and written).
Experience:1+ years
Education:Bachelor's
Skills:CommunicationIndependentlyProblem-solving
Tech Stack:EDAGDSLinuxShell scriptingPerlPythonRevision control

Eligibility

Nationality:US National

Company Brief

SpaceX
Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Growth: Established Company
Valuation: Hectocorn (USD 100B+)
Funding: Series E+
Headquarters: Hawthorne, United States
Founded: 2002
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