Senior Software R&D Engineer, ECO Route - VLSI EDA

NVIDIA
Santa Clara, Austin
Workplace: OnsiteFull timeUSD 168,000 - 310,500 annuallyFunction: Research & Scientific (R&D)Experience: 5+ yearsSkills: ["Problem-solving","Ownership","Cross-domain collaboration"]

Develop incremental physical-design technology for fast, DRC- and parasitic-aware implementation of high-performance logic changes, including all-layer and metal-only ECOs. Create improved detailed-routing algorithms that handle DRC-constrained discrete/continuous optimizations in leading-edge manufacturing. Build cross-domain optimization tools spanning logic, timing, clocks, testability, power delivery, placement, and routing. Own problems end-to-end from invention through validation and production deployment.

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FursaFursa
NVIDIA
NVIDIA
1 week ago

Senior Software R&D Engineer, ECO Route - VLSI EDA

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Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live

Job Summary

Develop incremental physical-design technology for fast, DRC- and parasitic-aware implementation of high-performance logic changes, including all-layer and metal-only ECOs. Create improved detailed-routing algorithms that handle DRC-constrained discrete/continuous optimizations in leading-edge manufacturing. Build cross-domain optimization tools spanning logic, timing, clocks, testability, power delivery, placement, and routing. Own problems end-to-end from invention through validation and production deployment.
Location: Santa Clara, Austin
Workplace: Onsite
Employment Type: Full time
Job Function: Research & Scientific (R&D)
Seniority: Mid level

Key Responsibilities

  • •Develop incremental physical-design technology for rapid high-performance logic changes with DRC and parasitic awareness, including all-layer and metal-only ECOs.
  • •Invent improved detailed-routing algorithms for DRC-constrained discrete/continuous optimization problems in latest manufacturing processes.
  • •Create cross-domain optimization tools covering logic, timing, clocks, testability, power distribution, placement, routing, and DRCs.
  • •Own problems end-to-end from algorithm invention through implementation, validation, and production deployment.

Pay and Benefits

Salary: USD 168,000 - 310,500 annually
Equity and Bonus:Equity

Key Requirements

  • •MS, PhD, or equivalent experience with 5+ years of relevant experience.
  • •Strong expertise in C++ plus high-performance software architecture and algorithm development (complexity, data structures, memory efficiency).
  • •Deep understanding of detailed routing, including advanced design rules, pin access, route optimization, and DRC-aware implementation.
  • •Understanding of ECO co-optimized areas including clock distribution, DFT, and power delivery.
  • •Authorization to work on export controlled data arising in CPUs, GPUs, LPUs, and communication networks.
Experience:5+ yearsVLSI EDAPhysical designMachine learningHigh-performance computing
Skills:Problem-solvingOwnershipCross-domain collaboration
Tech Stack:C++Machine learningSAT solversLLMsReinforcement learningGNNs

Company Brief

NVIDIA
Designs and manufactures GPUs, AI accelerators, and system-on-chip products for gaming, data centers, professional visualization, and automotive markets, enabling advanced graphics, AI, and high-performance computing solutions worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1993
Glassdoor
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