PCIe, CXL and Highspeed IO Validation Engineer

AMD
Austin, Santa Clara
Workplace: HybridFull timeFunction: Hardware, Embedded & Systems EngineeringExperience: 5-7 yearsEducation: mastersSkills: ["Cross-functional collaboration","Root-cause analysis","Strong communication","Analytical problem-solving","Attention to detail"]

Drive post-silicon validation for AMD datacenter CPU high-speed I/O technologies, focusing on PCI Express, CXL, multi-socket, and inter-die interfaces. Build and execute feature enablement and validation test plans, develop stress/focus test content, and create validation infrastructure spanning software, hardware, automation, and lab setup. Debug SoC issues, perform root-cause analysis, and collaborate cross-functionally to improve validation methodology and tools.

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FursaFursa
AMD
AMD
1 month ago

PCIe, CXL and Highspeed IO Validation Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Drive post-silicon validation for AMD datacenter CPU high-speed I/O technologies, focusing on PCI Express, CXL, multi-socket, and inter-die interfaces. Build and execute feature enablement and validation test plans, develop stress/focus test content, and create validation infrastructure spanning software, hardware, automation, and lab setup. Debug SoC issues, perform root-cause analysis, and collaborate cross-functionally to improve validation methodology and tools.
Location: Austin, Santa Clara
Workplace: Hybrid
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Develop and execute feature enablement and validation test plans for high-speed I/O across AMD server products.
  • •Create test content for focus testing and system-level stress testing, including cross-product stress testing.
  • •Build post-silicon validation infrastructure across software, hardware, automation, and lab setup.
  • •Test interactions between SoC features using the validation infrastructure and debug SoC-related issues.
  • •Collaborate with cross-functional teams to improve validation test strategy, methodology, tools, and process.

Key Requirements

  • •Hands-on experience in SoC design or validation of high-speed I/O interfaces.
  • •Experience with PCIe Gen5/6+, CXL, UCIe, or proprietary inter-die and multi-socket server interfaces.
  • •Understanding of modern x86 microprocessor and server platform architecture.
  • •Experience developing validation methodologies and infrastructure, including test plan and workload development.
  • •Familiarity with scripting/programming languages (C/C++, Python, Perl) and working knowledge of server OSes (Linux, Windows).
Experience:5-7 years
Education:Master's in BSEE/CSE/CS or MSEE/CSE/CS
Skills:Cross-functional collaborationRoot-cause analysisStrong communicationAnalytical problem-solvingAttention to detail
Languages:English
Tech Stack:PCI ExpressPCIeCXLCompute Express LinkUCIeSoCMulti-socketInter-die interfacesX86 microprocessorLinuxWindowsCC++PythonPerlProtocol/logic analyzersOscilloscopes

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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