Lead Design Engineer

Cadence Design Systems
India
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 4-7 yearsEducation: bachelorsSkills: ["Communication","Problem-solving","Presentation"]

Lead a design verification and PDK development effort for Cadence, focusing on integrating foundry rule decks, QA and automation for layout verification. Drive automation of LVS/DRC/RM/Parasitic Extraction, collaborate with design and foundry teams, and ensure quality of PDKs within the Cadence design environment using Cadence Python, SKILL and Perl.

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Cadence Design Systems
Cadence Design Systems
7 months ago

Lead Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 9 hours agoStatus: Live

Job Summary

Lead a design verification and PDK development effort for Cadence, focusing on integrating foundry rule decks, QA and automation for layout verification. Drive automation of LVS/DRC/RM/Parasitic Extraction, collaborate with design and foundry teams, and ensure quality of PDKs within the Cadence design environment using Cadence Python, SKILL and Perl.
Location: India
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Develop & integrate foundry rule decks & technology files to support PDKs using foundry provided process design kits as a starting point.
  • •PDK QA, verification and release methodology for decks and specialized setups including track patterns to aid in layout.
  • •Develop scripts to automate LVS, DRC, RM, IR and Parasitic Extraction flows and support layout verification flow issues.
  • •Ensure QA of the integrated PDKs with the custom design environment and add sub scripts to improve QA efficiency.
  • •Provide general tool usage support, real-time tool assistance, bug workarounds, and filing CCRs with R&D.

Key Requirements

  • •Bachelor’s Degree in Electrical/Electronic Engineering or equivalent.
  • •4-7 years of work experience in PDK development and CAD enablement.
  • •Expertise in Cadence Python, SKILL, Perl programming languages.
Experience:4-7 yearsSemiconductorsEDAPDKIC design
Education:Bachelor's
Skills:CommunicationProblem-solvingPresentation
Tech Stack:Cadence PythonSKILLPerlPythonVirtuosoPcellCDFGitSubversionSynchronicityDRCLVSParasitic Extraction

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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