ASIC Design Verification Engineer

AMD
Ottawa
Full timeFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Detail-oriented","Accurate","Communication","Problem-solving"]

Join the front-end verification team to help deliver first-pass silicon success. Collaborate with architecture, IP, physical design, and product engineers to understand features to verify, create test plan documentation, and define verification/reuse and testbench strategies. Build directed and random verification tests, debug failures to root cause, and work with RTL/firmware teams to fix defects. Track functional and code coverage, improving tests to meet requirements.

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FursaFursa
AMD
AMD
3 weeks ago

ASIC Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live
Reposted: similar role first listed 8 months ago

Job Summary

Join the front-end verification team to help deliver first-pass silicon success. Collaborate with architecture, IP, physical design, and product engineers to understand features to verify, create test plan documentation, and define verification/reuse and testbench strategies. Build directed and random verification tests, debug failures to root cause, and work with RTL/firmware teams to fix defects. Track functional and code coverage, improving tests to meet requirements.
Location: Ottawa
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Collaborate with architects, hardware engineers, and firmware engineers to understand new features to be verified.
  • •Build test plan documentation covering interactions across hardware, firmware, and software driver use cases.
  • •Decide on verification and reuse strategy and testbench architecture; estimate time for feature test development.
  • •Build directed and random verification tests and debug failures to identify root cause.
  • •Review functional and code coverage metrics and modify/add tests or constrain random tests to meet coverage requirements.

Key Requirements

  • •Proficient in IP-level ASIC verification strategies.
  • •Expertise with UVM concepts and SystemVerilog, including architecting UVM testbenches.
  • •Ability to debug RTL code using simulation tools.
  • •Experience building verification frameworks and testbenches, working in Linux and Windows environments.
  • •Scripting experience (Perl, Python, Makefile, or shell) and exposure to automation in distributed compute environments.
Experience:ASIC verificationDigital designRTL debuggingUVM verificationSimulationFormal verification
Education:Master's in Computer Engineering/Electrical Engineering or Computer Science
Skills:Detail-orientedAccurateCommunicationProblem-solving
Tech Stack:UVMSystemVerilogRTLSimulation toolsLinuxWindowsTestbenchPerlPythonMakefileShellFormal verificationEthernetAI toolsDirected testsRandom verification tests

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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