Physical Design PDK Engineer

Applied Materials
Santa Clara
Workplace: OnsiteFull timeUSD 152,000 - 208,500Function: Design (Product/UX/UI/Visual)Skills: ["Automation","Collaboration","Troubleshooting","Proactive problem-solving","Communication"]

Drive onsite PDK enablement and library validation/automation for semiconductor physical design flows. Hands-on work across LVS, parasitic extraction, and standard cell characterization, with system-level DTCO and PPA analysis. Use scripting and tools (TCL, Python, make/shell, Synopsys Fusion Compiler, Cadence Innovus) to apply RTL2GDS methodologies, troubleshoot complex issues, and collaborate cross-functionally with internal stakeholders, customers, and vendors.

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FursaFursa
Applied Materials
Applied Materials
2 days ago

Physical Design PDK Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 9 hours agoStatus: Live

Job Summary

Drive onsite PDK enablement and library validation/automation for semiconductor physical design flows. Hands-on work across LVS, parasitic extraction, and standard cell characterization, with system-level DTCO and PPA analysis. Use scripting and tools (TCL, Python, make/shell, Synopsys Fusion Compiler, Cadence Innovus) to apply RTL2GDS methodologies, troubleshoot complex issues, and collaborate cross-functionally with internal stakeholders, customers, and vendors.
Location: Santa Clara
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Lead PDK enablement and library validation/automation for physical design.
  • •Execute hands-on LVS, parasitic extraction, and standard cell characterization work.
  • •Perform DTCO and PPA analysis at the design/system level.
  • •Apply RTL2GDS methodology using Synopsys/Cadence physical design tools and standard cell architecture knowledge.
  • •Proactively identify technology-node trends, implement solutions, troubleshoot complex issues, and collaborate cross-functionally.
Travel: Low travel

Pay and Benefits

Salary: USD 152,000 - 208,500

Key Requirements

  • •Expertise in PDK enablement and library validation/automation.
  • •Hands-on experience with LVS, parasitic extraction, and standard cell characterization flows.
  • •Design/system-level experience with DTCO and PPA analysis.
  • •Hands-on expertise with TCL, Python, and make and shell scripting.
  • •Strong understanding of RTL2GDS concepts and experience with Synopsys/Cadence physical design tools (Fusion Compiler/Innovus).
Experience:SemiconductorsEDAPhysical design
Skills:AutomationCollaborationTroubleshootingProactive problem-solvingCommunication
Tech Stack:PDKLVSParasitic extractionTCLPythonMakeShell scriptingSynopsys Fusion CompilerCadence InnovusDTCOPPARTL2GDSStandard cell

Company Brief

Applied Materials
Provides semiconductor manufacturing equipment, services, and software used to build advanced chips and display technologies. Its tools support materials engineering, deposition, etching, inspection, and process control for major electronics manufacturers worldwide.
Industry: Industrial Machinery
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1967
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