SMTS Silicon Design Engineer
Taipei
Workplace: HybridFull timeTWD 2,190,300 - 3,129,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 9+ yearsEducation: bachelorsSkills: ["Detail-oriented","Communication","Problem-solving","Independent working","Planning"]Join the AMD I/O IP team to design host controller IP for next-generation high-speed I/O technologies up to 40 Gb/s. You’ll develop and verify RTL code in Verilog HDL, ensure functional correctness and reusability across product lines, and solve complex technical problems that drive design improvements. The role also includes making technical decisions and coaching/mentoring junior engineers.
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