Cadence Design Systems

4 weeks ago

Principal Design Engineer - Physical Design

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 23 hours agoStatus: Live

Job Summary

Lead high-speed digital DDR PHY physical design in a cutting-edge semiconductor environment. Drive PD flow improvements with scripting, tackle FLOORPLAN/CTS/STA/physical verification and power analysis, and optimize parameters for multiple projects. Collaborate across product teams using advanced methodologies and processes on state-of-the-art nodes (2nm–12nm) to deliver high-performance hardware solutions.

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Focus on high-speed digital DDR PHY IP physical implementation.
•Develop necessary scripts or tools to enhance the current PD design flow.
•Work in product projects, complete tasks, solve design issues and implement flows to prevent recurrence.
•Analyze and summarize PPA optimization methodologies and results; implement optimal design parameters and flows for different projects.
•Collaborate with cross-functional teams to ensure robust physical design delivery across multiple nodes (2nm–12nm).

Key Requirements

•BS with 7+ years of experience or MS with 5+ years of experience
•Strong physical design experience in the digital implementation domain including floorplanning, CTS, STA, physical verification, and power analysis
•Solid background in circuits, electronics, and physics; willingness to learn new technology for cutting-edge process nodes
•Skilled in scripting languages such as Perl, C shell, TCL, Makefile, and Python
•Familiar with EDA tools such as Innovus, ICC, Calibre, Tempus, and PrimeTime

Experience:7+ yearsSemiconductorsEDAChip design

Education:Bachelor's

Skills:PerlC shellTCLMakefilePythonInnovusICCCalibreTempusPrimeTime

Tech Stack:PerlC shellTCLMakefilePythonInnovusICCCalibreTempusPrimeTime

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

4 weeks ago

Principal Design Engineer - Physical Design

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 23 hours agoStatus: Live

Job Summary

Location: Shanghai

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Focus on high-speed digital DDR PHY IP physical implementation.
•Develop necessary scripts or tools to enhance the current PD design flow.
•Work in product projects, complete tasks, solve design issues and implement flows to prevent recurrence.
•Analyze and summarize PPA optimization methodologies and results; implement optimal design parameters and flows for different projects.
•Collaborate with cross-functional teams to ensure robust physical design delivery across multiple nodes (2nm–12nm).

Key Requirements

•BS with 7+ years of experience or MS with 5+ years of experience
•Strong physical design experience in the digital implementation domain including floorplanning, CTS, STA, physical verification, and power analysis
•Solid background in circuits, electronics, and physics; willingness to learn new technology for cutting-edge process nodes
•Skilled in scripting languages such as Perl, C shell, TCL, Makefile, and Python
•Familiar with EDA tools such as Innovus, ICC, Calibre, Tempus, and PrimeTime

Experience:7+ yearsSemiconductorsEDAChip design

Education:Bachelor's

Skills:PerlC shellTCLMakefilePythonInnovusICCCalibreTempusPrimeTime

Tech Stack:PerlC shellTCLMakefilePythonInnovusICCCalibreTempusPrimeTime

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor