Lead Product Engineer

Cadence Design Systems
Bengaluru
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceExperience: 4-8 yearsEducation: bachelorsSkills: ["SystemVerilog","UVM","DDR","HBM","LPDDR","Memory models","Verification IP"]

Lead Product Engineer responsible for driving development of memory-domain verification IP products, translating customer requirements into technical specs, and enabling adoption with top-tier clients. Requires strong verification expertise (Memory models such as DDR/HBM/LPDDR), SystemVerilog verification environments, and UVM usage, with collaboration across R&D, marketing, and support. Travel ~20% as needed.

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Cadence Design Systems
Cadence Design Systems
8 months ago

Lead Product Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 14 hours agoStatus: Live

Job Summary

Lead Product Engineer responsible for driving development of memory-domain verification IP products, translating customer requirements into technical specs, and enabling adoption with top-tier clients. Requires strong verification expertise (Memory models such as DDR/HBM/LPDDR), SystemVerilog verification environments, and UVM usage, with collaboration across R&D, marketing, and support. Travel ~20% as needed.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Leads projects with high resource, risk and/or complexity.
  • •Develops and leads large and multiple cross-functional and cross-organizational programs, initiatives, and activities with high resource requirements, risk and/or complexity.
  • •Continually evaluates technology effectiveness/data interoperability of complex systems.
  • •Manages issue resolution with vendors on tech/product quality and functionality and influences vendor roadmap and direction of products.
  • •Communicates highly-complex ideas, anticipates potential objections and persuades others, often at senior levels, to adopt a different point of view.

Pay and Benefits

Perks:Learning Budget

Key Requirements

  • •BE/BTech/ME/MS/MTech in Electrical, Electronics & Comm or Computer Science Engineering.
  • •4+ to 8 years of experience with Verification and Design
  • •Working knowledge with Memory Models like DDR, HBM, LPDDR protocols
  • •Experience with Developing Verification environments using SystemVerilog
  • •Working knowledge and experience with the UVM methodology
Experience:4-8 yearsSemiconductorElectronicsVerification
Education:Bachelor's in Electrical, Electronics & Comm or Computer Science Engineering
Skills:SystemVerilogUVMDDRHBMLPDDRMemory modelsVerification IP
Tech Stack:SystemVerilogUVMDDRHBMLPDDR

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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Glassdoor: 3.9
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