CPU RTL Power, Clocking, Reset Design Engineer

AMD
United States
Workplace: OnsiteFull timeUSD 126,700 - 217,200 annuallyFunction: Design (Product/UX/UI/Visual)Education: bachelorsSkills: ["Communication","Problem-solving","Analytical thinking","Mentoring"]

Own power management, clocking, and reset microarchitecture and RTL for AMD’s Core Complex Cache Hierarchy designs. Collaborate across architecture, physical design, verification, and DFT to deliver high-performance Power/Clocking/Reset control fabric optimized for timing, testability, and manufacturability. Work with global IP and SoC teams to resolve complex interactions, improve CPU quality/performance/power/area, and guide/mentor engineers through challenging RTL and tool problems.

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FursaFursa
AMD
AMD
17 hours ago

CPU RTL Power, Clocking, Reset Design Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 1 hour agoStatus: Live

Job Summary

Own power management, clocking, and reset microarchitecture and RTL for AMD’s Core Complex Cache Hierarchy designs. Collaborate across architecture, physical design, verification, and DFT to deliver high-performance Power/Clocking/Reset control fabric optimized for timing, testability, and manufacturability. Work with global IP and SoC teams to resolve complex interactions, improve CPU quality/performance/power/area, and guide/mentor engineers through challenging RTL and tool problems.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Collaborate with architecture, physical design, verification, and DFT teams to design, document, implement, verify, and deliver Power, Clocking, Reset, and Control Fabric RTL optimized for timing, testability, and physical implementation.
  • •Drive execution by working across global IP and SoC teams to solve complex architectural interactions.
  • •Improve CPU design quality, performance, power, and area through innovation, simplification, and cross-functional technical collaboration.
  • •Solve complex design and tool challenges using innovative approaches and present technical solutions to peers and management.
  • •Guide, mentor, and develop engineers across the organization.

Pay and Benefits

Salary: USD 126,700 - 217,200 annually

Key Requirements

  • •Experience delivering CPU RTL or microarchitecture goals on aggressive schedules, with strong clocking and system management expertise.
  • •Strong background in digital RTL design with Verilog HDL and scripting.
  • •Experience delivering high-performance CPU architecture and implementation across clocks, power management, reset, and clock/reset-related domains.
  • •Experience with system/voltage management and clock control architecture, implementation, and tapeout closure.
  • •Bachelor’s or Master’s degree in Computer Engineering, Electrical Engineering, or Computer Science.
Experience:CPU architectureRTL designSoC development
Education:Bachelor's in Computer Engineering, Electrical Engineering, or Computer Science
Skills:CommunicationProblem-solvingAnalytical thinkingMentoring
Tech Stack:Verilog HDL

Eligibility

Work Authorization:Authorization required. Sponsorship not provided.

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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