Sr. ASIC Design Engineer (Starshield)

SpaceX
United States
Workplace: OnsiteFull timeUSD 160,000 - 225,000 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: bachelorsSkills: ["Teamwork","Communication","Problem-solving","Adaptability"]

Senior ASIC/FPGA design engineer on the Starshield team responsible for developing digital ASICs and FPGAs, defining micro-architecture, RTL implementation in Verilog/SystemVerilog, and collaborating with verification and physical implementation teams to deliver validated, timing-accurate designs for space-ground infrastructure and national security applications.

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FursaFursa
SpaceX
SpaceX
5 months ago

Sr. ASIC Design Engineer (Starshield)

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Source: Company careers pageValidated by: Fursa AI
Last checked: 7 hours agoStatus: Live

Job Summary

Senior ASIC/FPGA design engineer on the Starshield team responsible for developing digital ASICs and FPGAs, defining micro-architecture, RTL implementation in Verilog/SystemVerilog, and collaborating with verification and physical implementation teams to deliver validated, timing-accurate designs for space-ground infrastructure and national security applications.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

  • •Design digital ASICs and/or FPGAs for Starshield projects.
  • •Define micro-architecture, implement the RTL in Verilog/SystemVerilog, integrate that in top level and deliver the fully verified, synthesis/timing clean design.
  • •Work closely with verification team to ensure all aspects of the design are covered and verified.
  • •Provide timing constraints for those IPs and support the physical implementation team (synthesis, timing closure, formality check).
  • •Participate in silicon bring-up and validation; assist in the development of automated test lab equipment for lab measurements.
Travel: Medium travel

Pay and Benefits

Salary: USD 160,000 - 225,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceVisionDental401kDisability InsuranceLife InsuranceParential LeavePaid LeaveHolidaysEquityRetirement

Key Requirements

  • •Bachelor’s degree in electrical engineering, computer engineering, or computer science.
  • •5+ years of experience in RTL implementation and/or FPGA/ASIC development.
  • •Experience solving clock domain crossings and power optimization.
  • •Experience developing complex ASICs.
  • •Experience with multicore CPU subsystem design.
Experience:5+ yearsDefenseSpaceAerospace
Education:Bachelor's
Skills:TeamworkCommunicationProblem-solvingAdaptability
Languages:English
Tech Stack:VerilogSystemVerilogRTLFPGAASICPythonTCLVCSQuestaIESSpyglassVivadoQuartus

Eligibility

Security Clearance:TS-SCI

Company Brief

SpaceX
Designs, manufactures, and launches advanced rockets and spacecraft for commercial and government customers, aiming to reduce space transportation costs and enable human life on Mars through reusable launch vehicles and integrated space systems.
Industry: Aerospace Manufacturing
Company Size: Enterprise (1,001+ employees)
Growth: Established Company
Valuation: Hectocorn (USD 100B+)
Funding: Series E+
Headquarters: Hawthorne, United States
Founded: 2002
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