Principal Product Engineer

Cadence Design Systems
Bengaluru
Workplace: OnsiteFull timeFunction: Communications, PR & CommunitySkills: ["Communication","Leadership","Mentorship","Collaboration","Problem-solving"]

Lead and optimize the Perspec tool and libraries for SoC verification, working with R&D, field applications, and customers to design, implement, and integrate verification methodologies across ARM, RISC-V, PCIe, and performance domains. Provide technical leadership in multiple verification areas and mentor junior engineers to ensure reusable verification scenarios and customer-focused solutions.

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Cadence Design Systems
Cadence Design Systems
7 months ago

Principal Product Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 6 hours agoStatus: Live
Reposted: similar role first listed 8 months ago

Job Summary

Lead and optimize the Perspec tool and libraries for SoC verification, working with R&D, field applications, and customers to design, implement, and integrate verification methodologies across ARM, RISC-V, PCIe, and performance domains. Provide technical leadership in multiple verification areas and mentor junior engineers to ensure reusable verification scenarios and customer-focused solutions.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Communications, PR & Community
Seniority: Sr. Manager level

Key Responsibilities

  • •Lead the development and enhancement of the Perspec System Verifier tool and its associated libraries.
  • •Collaborate closely with R&D teams to design, implement, and improve verification methodologies and product features.
  • •Work with field application engineers and end customers to understand their verification challenges and provide effective solutions using Perspec tools and libraries.
  • •Drive the integration of Perspec with various verification environments, including ARM, RISC-V, PCIe, and performance verification domains.
  • •Provide technical leadership in one or more verification domains such as ARM Architecture, RISC-V Architecture, PCI Express (PCIe), and Performance Verification.

Key Requirements

  • •Strong background in product engineering or verification tool development.
  • •Deep understanding of SoC verification challenges across ARM, RISC-V, PCIe, and performance domains.
  • •Experience collaborating with R&D, field application engineers, and customers.
  • •Familiarity with multi-threaded and multi-executable verification environments.
  • •Excellent communication and leadership skills.
Experience:SoC verificationVerification tool development
Skills:CommunicationLeadershipMentorshipCollaborationProblem-solving
Tech Stack:SystemVerilogARMRISC-VPCIeAMBA CHIACE-Lite

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
Glassdoor
Glassdoor: 3.9
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