AIE Software Development Engineer

AMD
San Jose
Workplace: HybridFull timeUSD 150,500 - 258,000 annuallyFunction: Product ManagementEducation: bachelorsSkills: ["Problem-solving","Debugging","Collaboration","Technical communication"]

Design and optimize AI workloads for AMD’s NPU-based devices by building and enhancing compiler tools. You’ll implement and debug MLIR passes, analyze functional and performance issues, and create infrastructure to analyze and debug regression suites. You’ll also apply AI/coding agents for compiler development, test generation, and performance analysis while working on next-generation Vitis-AI and Ryzen-AI platform capabilities.

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FursaFursa
AMD
AMD
1 day ago

AIE Software Development Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 13 hours agoStatus: Live

Job Summary

Design and optimize AI workloads for AMD’s NPU-based devices by building and enhancing compiler tools. You’ll implement and debug MLIR passes, analyze functional and performance issues, and create infrastructure to analyze and debug regression suites. You’ll also apply AI/coding agents for compiler development, test generation, and performance analysis while working on next-generation Vitis-AI and Ryzen-AI platform capabilities.
Location: San Jose
Workplace: Hybrid
Employment Type: Full time
Job Function: Product Management

Key Responsibilities

  • •Enhance, implement, and design compiler passes in the MLIR framework to implement and optimize AI workloads on NPUs.
  • •Analyze and debug functional and performance issues in AI compilation and optimization workflows.
  • •Build infrastructure to analyze and debug regression suites.
  • •Apply AI and coding agents to compiler development, debugging, test generation, and performance analysis.
  • •Debug and fix existing issues while researching more efficient approaches; develop technical relationships with peers and partners.

Pay and Benefits

Salary: USD 150,500 - 258,000 annually

Key Requirements

  • •Strong object-oriented programming background with C/C++ preferred.
  • •Deep hands-on experience with MLIR optimization and lowering passes.
  • •Strong understanding of compiler architecture, intermediate representations, transformation passes, and optimization pipelines.
  • •Strong knowledge of NPU architecture including parallel execution, memory hierarchy, caches, registers, synchronization, and occupancy.
  • •Strong C++ and Python skills, plus experience with AI compilers/tensor or graph compilers and debugging using SystemC and RTL simulators.
Experience:AI/MLCompilersMLIRNPUAI compilersTensor/graph compilers
Education:Bachelor's in Computer Science, Computer Engineering, Electrical Engineering, or equivalent
Skills:Problem-solvingDebuggingCollaborationTechnical communication
Tech Stack:CC++PythonMLIRVitis Unified Software PlatformVitis-AIRyzen AINPUAI-engine architectureIntermediate representationsTransformation passesOptimization pipelinesTensor compilersGraph compilersSystemCRTL simulators

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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