Intel

1 month ago

Qubit Control Physical Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 4 hours agoStatus: Live

Job Summary

Design and drive RTL-to-GDS physical design for qubit control, leading block-level PD delivery, synthesis and PNR, and sign-off while collaborating with CAD/PD teams to optimize cryogenic control design. Target ambitious PPA goals, improve silicon yield, and mentor junior engineers within a cross-functional hardware team.

Location: United States

Workplace: Hybrid

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals
•Be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield
•Work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in cryogenic control design
•Drive physical implementation through synthesis, formal verification, floor planning, bus/pin planning, place-and-route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off
•Work with custom IP teams to define and co-optimize memory macros and library standard cells to improve design PPA

Pay and Benefits

Salary: USD 141,910 - 269,100 annually

Equity and Bonus:Equity

Perks:EquityHealth InsuranceRetirementPaid Leave

Key Requirements

•8+ years of relevant experience with a Bachelor’s, Master’s, or Ph.D. degree
•Experience with logic design and digital circuits
•Experience in Python, PERL/TCL, Linux/Unix shell and C
•Experience with industry standard logic synthesis, PnR, STA and Power analysis tools, timing budgeting, floor-planning, physical integration, and verification
•Experience with DFT and DFM flows or low power, high frequency physical design techniques

Experience:8+ yearsSemiconductorHardwareQuantumIC design

Skills:CommunicationInterpersonal skillsMentorshipTeam collaborationLeadership

Tech Stack:PythonPerlTCLLinuxCLogic synthesisPlace-and-routeSynthesisPNRSTAPower analysisDFTDFMGDSRTLCryogenic control design

Company Brief

Intel

Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor

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Intel

1 month ago

Qubit Control Physical Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 4 hours agoStatus: Live

Job Summary

Location: United States

Workplace: Hybrid

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Drive RTL-to-GDS design convergence through logic synthesis and place-and-route tools targeting ambitious PPA goals
•Be responsible for block-level physical design delivery along with closure of backend flows, electrical requirements and improving silicon yield
•Work closely with internal CAD and PD methodology teams on industry standard synthesis/PNR tool features and optimizations and their adoption in cryogenic control design
•Drive physical implementation through synthesis, formal verification, floor planning, bus/pin planning, place-and-route, power/clock distribution, congestion analysis, timing closure, IR drop analysis, physical verification, ECO and sign-off
•Work with custom IP teams to define and co-optimize memory macros and library standard cells to improve design PPA

Pay and Benefits

Salary: USD 141,910 - 269,100 annually

Equity and Bonus:Equity

Perks:EquityHealth InsuranceRetirementPaid Leave

Key Requirements

•8+ years of relevant experience with a Bachelor’s, Master’s, or Ph.D. degree
•Experience with logic design and digital circuits
•Experience in Python, PERL/TCL, Linux/Unix shell and C
•Experience with industry standard logic synthesis, PnR, STA and Power analysis tools, timing budgeting, floor-planning, physical integration, and verification
•Experience with DFT and DFM flows or low power, high frequency physical design techniques

Experience:8+ yearsSemiconductorHardwareQuantumIC design

Skills:CommunicationInterpersonal skillsMentorshipTeam collaborationLeadership

Tech Stack:PythonPerlTCLLinuxCLogic synthesisPlace-and-routeSynthesisPNRSTAPower analysisDFTDFMGDSRTLCryogenic control design

Company Brief

Intel

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1968

Glassdoor: 3.8

Website LinkedIn Glassdoor