Cadence Design Systems

4 weeks ago

Principal Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 4 hours agoStatus: Live

Job Summary

Lead design and development of high-speed IP cores (GDDR7, DDR5, LPDDR6) in the analog domain. You will contribute across analog, digital, layout, documentation, and silicon validation, participate in customer discussions, and drive IP cycles from spec to silicon, delivering robust memory IP for Cadence’s semiconductor portfolio.

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Design and lead high-speed IP development (GDDR7, DDR5, LPDDR6) in the analog domain.
•Participate in all aspects of development – analog design, layout, digital design, documentation, and silicon validation.
•Engage in customer-facing discussions and present technical findings and progress.
•Contribute to IP creation lifecycle from specification to silicon debug and characterization.
•Collaborate with cross-functional teams to ensure IPs meet performance, area, and power targets.

Key Requirements

•B.Tech/BE/ME/Mtech
•5+ years of experience
•Hands-on design experience and leading GDDR/DDR/LPDDR IPs
•Participation in full cycles of analog IP creation—from spec to silicon debug and char
•Strong communication skills and ability to work in a team

Experience:5+ yearsSemiconductorHardwareIP design

Education:Bachelor's

Skills:GDDR7DDR5LPDDR6Analog designDigital designSilicon validation

Tech Stack:GDDR7DDR5LPDDR6Analog designDigital designSilicon validation

Company Brief

Cadence Design Systems

Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor

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Cadence Design Systems

4 weeks ago

Principal Design Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 4 hours agoStatus: Live

Job Summary

Location: Bengaluru

Workplace: Onsite

Employment Type: Full time

Job Function: Design (Product/UX/UI/Visual)

Key Responsibilities

•Design and lead high-speed IP development (GDDR7, DDR5, LPDDR6) in the analog domain.
•Participate in all aspects of development – analog design, layout, digital design, documentation, and silicon validation.
•Engage in customer-facing discussions and present technical findings and progress.
•Contribute to IP creation lifecycle from specification to silicon debug and characterization.
•Collaborate with cross-functional teams to ensure IPs meet performance, area, and power targets.

Key Requirements

•B.Tech/BE/ME/Mtech
•5+ years of experience
•Hands-on design experience and leading GDDR/DDR/LPDDR IPs
•Participation in full cycles of analog IP creation—from spec to silicon debug and char
•Strong communication skills and ability to work in a team

Experience:5+ yearsSemiconductorHardwareIP design

Education:Bachelor's

Skills:GDDR7DDR5LPDDR6Analog designDigital designSilicon validation

Tech Stack:GDDR7DDR5LPDDR6Analog designDigital designSilicon validation

Company Brief

Cadence Design Systems

Industry: Developer Tools

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: San Jose, United States

Founded: 1988

Glassdoor: 3.9

Website LinkedIn Glassdoor