SR ENGINEER, DPG ARCHITECTURE STRATEGY

Micron Technology
San Jose
Workplace: OnsiteFull timeUSD 170,604 - 238,000 annuallyFunction: Architecture & Urban PlanningEducation: mastersSkills: ["Communication","Technical reporting","Presentations","System design","Debugging"]

Develop hardware models for DRAM features by understanding the LPDRAM state machine, and build memory controller models for request scheduling and address mapping. Create automation test scripts in Python to improve simulation methodologies, and implement DRAM technology changes per specifications. Own system-level engineering work, design and run hardware/software validation tests, and communicate results through technical reports, presentations, and standards updates.

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Micron Technology
Micron Technology
1 week ago

SR ENGINEER, DPG ARCHITECTURE STRATEGY

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Source: Company careers pageValidated by: Fursa AI
Last checked: 5 hours agoStatus: Live

Job Summary

Develop hardware models for DRAM features by understanding the LPDRAM state machine, and build memory controller models for request scheduling and address mapping. Create automation test scripts in Python to improve simulation methodologies, and implement DRAM technology changes per specifications. Own system-level engineering work, design and run hardware/software validation tests, and communicate results through technical reports, presentations, and standards updates.
Location: San Jose
Workplace: Onsite
Employment Type: Full time
Job Function: Architecture & Urban Planning
Seniority: Mid level

Key Responsibilities

  • •Develop hardware models for DRAM features based on the LPDRAM state machine and related validation test bench.
  • •Build memory controller models (request scheduling and address mapping) to enable new DRAM features.
  • •Create Python automation test scripts to improve simulation methodologies.
  • •Develop DRAM technology changes per specification and validate them via the state machine and test bench.
  • •Perform system engineering across hardware/software architectures, run hardware/software tests, and publish findings via reports, presentations, and white papers.

Pay and Benefits

Salary: USD 170,604 - 238,000 annually
Perks:Health InsuranceDentalVisionPaid LeavePaid HolidaysParental Leave

Key Requirements

  • •Understand and model LPDRAM state-machine behavior and DRAM features for validation.
  • •Develop memory controller models, including request scheduling and address mapping for new DRAM features.
  • •Strong programming and debugging skills using C/C++ or Python, including GDB and PDB.
  • •Knowledge of computer architecture, including memory controller and cache policy.
  • •Experience with simulation methodologies for hardware/software verification and automation testing.
Experience:SemiconductorsMemoryDRAMComputer architectureHardware validationSimulation
Education:Master's in Electronics Engineering, Electrical Engineering, Computer Engineering, Computer Science, or related field
Skills:CommunicationTechnical reportingPresentationsSystem designDebugging
Tech Stack:CC++PythonGDBPDBLPDRAMMemory controllerCache policySimulation methodologies

Company Brief

Micron Technology
Designs and manufactures semiconductor memory and storage solutions, including DRAM, NAND, and NOR flash, for computing, networking, mobile, and automotive markets worldwide.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Boise, United States
Founded: 1978
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