Lead Product Validation Engineer

Cadence Design Systems
Noida
Workplace: OnsiteFull timeFunction: Administration & Executive AssistanceSkills: ["Problem-solving","Collaboration"]

Lead the verification of complex digital systems (SoC) using HDL languages (Verilog/VHDL) and SystemVerilog-based HVL, driving functional verification environments. Debug design/verification issues with EDA tools, automate processes with scripting, and contribute to simulations and emulation efforts to ensure robust hardware designs.

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FursaFursa
Cadence Design Systems
Cadence Design Systems
7 months ago

Lead Product Validation Engineer

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Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live
Reposted: similar role first listed 2 years ago

Job Summary

Lead the verification of complex digital systems (SoC) using HDL languages (Verilog/VHDL) and SystemVerilog-based HVL, driving functional verification environments. Debug design/verification issues with EDA tools, automate processes with scripting, and contribute to simulations and emulation efforts to ensure robust hardware designs.
Location: Noida
Workplace: Onsite
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Design and implement complex functional verification environments.
  • •Perform functional verification of complex digital systems (e.g., SoC) using HVL like SystemVerilog.
  • •Debug design/verification problems using HDL and EDA tools.
  • •Work with SystemVerilog, C++, and UVM in verification tasks.
  • •Perform simulation/emulation of HDL-based designs and automate processes with scripting.

Key Requirements

  • •Electrical, Electronics or Computer Science Engineer with very good understanding of HDLs (Verilog and/ or VHDL)
  • •Prior experience in simulation/emulation using these languages
  • •Good working knowledge of EDA tools (Cadence/ Others) with focus towards debugging design/ verification problems using these tools
  • •Experience in process automation with scripting
  • •Experience with SystemVerilog, C++, UVM
Experience:SemiconductorsEDASoC
Skills:Problem-solvingCollaboration
Languages:English
Tech Stack:VerilogVHDLSystemVerilogC++UVMEDA toolsCadencePCIeUSBDP

Company Brief

Cadence Design Systems
Provides electronic design automation (EDA) software, IP, and services for semiconductor and systems companies to design, verify, and implement integrated circuits, systems-on-chip, and electronic systems across industries including communications, automotive, and consumer electronics.
Industry: Developer Tools
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: San Jose, United States
Founded: 1988
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