AMD

1 week ago

Lead IP Verification Engineer with Memory controllers / Video / USB/Ethernet

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Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 8 hours agoStatus: Live

Job Summary

Plan, build, and execute verification for new and existing features in AMD Soft IP cores, delivering high-quality silicon-proven IP across supported platforms. Collaborate with IP designers, architects, and application engineers to create comprehensive verification strategies covering test plans, functional coverage, ABV, constrained-random, and formal verification where applicable. Own testbench strategy, coverage closure, debugging across digital and firmware interfaces, and improvements to UVM, regression, and CI/CD verification flows.

Location: Hyderabad

Workplace: Onsite

Employment Type: Full time

Job Function: Creative Production (Video/Audio/Photo)

Seniority: Sr. Manager level

Key Responsibilities

•Collaborate with IP designers, architects, and application engineers to understand new features and parameterization requirements to be verified.
•Develop comprehensive verification strategies including test plans, functional coverage models, assertion-based verification, constrained-random verification, and formal verification where applicable.
•Build comprehensive test plan documentation covering functional coverage, parameter space, platform interactions, and end-user use cases; estimate effort for new feature tests and verification environment updates.
•Develop directed and constrained-random verification tests, configure parameters, and drive coverage closure using coverage metrics, bug convergence, and quality sign-off criteria.
•Debug complex design and verification issues spanning digital and firmware interfaces; review verification architecture, testbench design, and coding standards; improve UVM/regression/CI-CD verification workflows and verification automation frameworks.

Pay and Benefits

Salary: INR 3,338,160 - 4,768,800 annually

Key Requirements

•7+ years of industry experience in IP/SoC level design verification.
•Proficient in IP-level ASIC or FPGA functional verification.
•Proficient in debugging RTL using industry-standard simulation tools (Questa, Xcelium, VCS, Vivado Simulator).
•Proficient in UVM-based testbench development and constrained-random verification methodologies.
•Scripting experience: Python, Perl, shell, or Makefile; exposure to verification automation frameworks and regression/CI/CD flows is preferred.

Experience:ASICFPGASoCIP verificationRTLUVM

Education:Bachelor's in computer engineering/Electrical Engineering

Skills:CommunicationAnalytical thinkingProblem-solvingCollaborationTeamwork

Languages:English

Tech Stack:SystemVerilogUVMUVM methodologyAssertion-based verification (ABV)SVAPSLConstrained-random verificationFunctional coverageCode coverageFormal verificationQuestaXceliumVCSVivado SimulatorRegression infrastructureCI/CDVerification automation frameworksLSFPythonPerl

Company Brief

AMD

Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Santa Clara, United States

Founded: 1969

Glassdoor: 3.9

Website LinkedIn

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AMD