Texas Instruments

3 months ago

Photolithography Process Development Engineer (Advanced Patterning)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 13 hours agoStatus: Live

Job Summary

Develop and characterize next-generation photolithography patterning processes for advanced-node logic technologies, focusing on litho-etch integration and advanced patterning (e.g., SADP/LELE, pitch doubling). Use lithography modeling and simulations to optimize process windows, and apply metrology (CD-SEM, overlay, scatterometry) to improve CDU, overlay, and yield. Lead SPC/DOE-driven process improvements, collaborate with RET/etch teams, and transfer technologies from R&D to high-volume manufacturing.

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Communications, PR & Community

Seniority: Mid level

Key Responsibilities

•Use lithography simulation software (e.g., Prolith, S-Litho) to analyze process windows and optimize patterning results.
•Apply advanced metrology (CD-SEM, Overlay, Scatterometry) to identify defects and improve Critical Dimension Uniformity (CDU) and overlay performance.
•Analyze process data to identify root cause and implement robust process improvements using SPC and DOE to enable litho shrink processes.
•Work with equipment vendors to evaluate new materials, photoresists, and tool hardware upgrades.
•Lead development of next-generation litho shrink processes for 20nm-class logic nodes, including litho-etch integration (LE/LELE/SADP/pitch doubling), RET/OPC strategies, materials selection, defect characterization, and collaboration with etch and cross-functional teams.

Key Requirements

•Master’s degree in Electrical Engineering, Materials Science, Physics, or a related discipline.
•5+ years of industry experience in advanced semiconductor process development.
•Hands-on experience with 22nm node or comparable advanced nodes (e.g., 28nm, 14nm).
•Strong expertise in photolithography process development/optimization, litho-etch integration (LELE, SADP, pitch splitting/doubling), OPC and RET methodologies, and dry etch pattern transfer.
•Deep understanding of critical dimension (CD) control and uniformity, overlay and alignment challenges, and defectivity mechanisms/mitigation.

Experience:Semiconductors

Education:Master's in Electrical Engineering, Materials Science, Physics, or related discipline

Skills:Problem-solvingData-driven approachCross-functional collaborationHands-on execution

Tech Stack:ProlithS-LithoCD-SEMOverlayScatterometrySPCDOEOPCResolution Enhancement Techniques (RET)High NA ImmersionImmersion lithographyDUVProximity Corrections (OPC)JMPPythonPhotoresistsHard masksAnti-reflective coatings

Company Brief

Texas Instruments

Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Dallas, United States

Founded: 1930

Website LinkedIn

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Texas Instruments

3 months ago

Photolithography Process Development Engineer (Advanced Patterning)

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI

Last checked: 13 hours agoStatus: Live

Job Summary

Location: United States

Workplace: Onsite

Employment Type: Full time

Job Function: Communications, PR & Community

Seniority: Mid level

Key Responsibilities

•Use lithography simulation software (e.g., Prolith, S-Litho) to analyze process windows and optimize patterning results.
•Apply advanced metrology (CD-SEM, Overlay, Scatterometry) to identify defects and improve Critical Dimension Uniformity (CDU) and overlay performance.
•Analyze process data to identify root cause and implement robust process improvements using SPC and DOE to enable litho shrink processes.
•Work with equipment vendors to evaluate new materials, photoresists, and tool hardware upgrades.
•Lead development of next-generation litho shrink processes for 20nm-class logic nodes, including litho-etch integration (LE/LELE/SADP/pitch doubling), RET/OPC strategies, materials selection, defect characterization, and collaboration with etch and cross-functional teams.

Key Requirements

•Master’s degree in Electrical Engineering, Materials Science, Physics, or a related discipline.
•5+ years of industry experience in advanced semiconductor process development.
•Hands-on experience with 22nm node or comparable advanced nodes (e.g., 28nm, 14nm).
•Strong expertise in photolithography process development/optimization, litho-etch integration (LELE, SADP, pitch splitting/doubling), OPC and RET methodologies, and dry etch pattern transfer.
•Deep understanding of critical dimension (CD) control and uniformity, overlay and alignment challenges, and defectivity mechanisms/mitigation.

Experience:Semiconductors

Education:Master's in Electrical Engineering, Materials Science, Physics, or related discipline

Skills:Problem-solvingData-driven approachCross-functional collaborationHands-on execution

Company Brief

Texas Instruments

Industry: Electronics Manufacturing

Company Size: Enterprise (1,001+ employees)

Revenue: USD 1B+

Growth: Public Company

Valuation: Public Company (Market Cap in USD)

Funding: IPO / Publicly Listed

Headquarters: Dallas, United States

Founded: 1930

Website LinkedIn