Hardware Design Integrity Engineer

Arista Networks
Santa Clara
Workplace: OnsiteFull timeUSD 130,000 - 225,000 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Debugging","Root cause analysis","Cross-functional collaboration","Escalation management","Technical communication"]

Work on high-speed networking and Ethernet hardware for enterprise campuses, hyperscaler data centers, and AI clusters. Debug production system problems and deliver root-cause analysis and fixes across CPU/ASIC, power, signal integrity, clocking, PCIe, optics, and components. Partner with software, customer, and hardware teams during escalations, perform lab measurements, develop scripts for log analysis, and help prevent design escapes through improved validation and testing.

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FursaFursa
Arista Networks
Arista Networks
1 day ago

Hardware Design Integrity Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 4 hours agoStatus: Live
Reposted: similar role first listed 2 months ago

Job Summary

Work on high-speed networking and Ethernet hardware for enterprise campuses, hyperscaler data centers, and AI clusters. Debug production system problems and deliver root-cause analysis and fixes across CPU/ASIC, power, signal integrity, clocking, PCIe, optics, and components. Partner with software, customer, and hardware teams during escalations, perform lab measurements, develop scripts for log analysis, and help prevent design escapes through improved validation and testing.
Location: Santa Clara
Workplace: Onsite
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Debug production hardware system issues and deliver solutions to the design team, executives, and customers
  • •Deep dive into hardware design areas including CPU/ASIC, power, SI, clocking, PCIe, optics, fab, and components
  • •Collaborate with software and customer teams during field escalations, analyzing logs and determining minimal-interruption fixes
  • •Write scripts to extract information from logs and support live debug sessions
  • •Perform lab measurements, coordinate component/third-party RCAs, identify test escapes, and write/present root cause analyses

Pay and Benefits

Salary: USD 130,000 - 225,000 annually
Equity and Bonus:Equity
Perks:Health InsuranceDentalVisionWellness StipendTax SavingsIncome Protection

Key Requirements

  • •BSEE or MSEE and 5+ years of relevant experience in hardware engineering
  • •Experience debugging networking hardware and validating complex high-speed systems
  • •Hands-on design and debug of high-speed interfaces including DDR and PCIe, plus low-speed signals like I2C and SPI
  • •Familiarity with signal integrity and power integrity concepts and tools (e.g., impedance, PDNs, Bode plots, TDRs, VNAs, PCIe analyzers)
  • •Experience with FPGA design using Verilog and debugging/validating multi-phase DC/DC converters
Experience:5+ yearsNetworking hardware
Education:Bachelor's
Skills:DebuggingRoot cause analysisCross-functional collaborationEscalation managementTechnical communication
Languages:English
Tech Stack:CPU/ASICHigh-speed PCBSignal integrityPower integrityImpedancePDNBode plotsPCIe analyzersTDRsVNADDRPCIeI2CSPIFPGAVerilogMulti-phase DC/DCBOMSchematicFirmware

Company Brief

Arista Networks
Designs and sells high-performance cloud networking hardware and software for large-scale data centers and enterprise environments, including switches, routers, and network operating systems focused on programmability, telemetry, and low-latency networking.
Industry: Networking Equipment
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 2004
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