Senior ASIC IP verification Engineer

AMD
Bengaluru
Full timeINR 2,186,520 - 3,123,600 annuallyFunction: Hardware, Embedded & Systems EngineeringExperience: 5+ yearsEducation: bachelorsSkills: ["Communication","Analytical thinking","Problem-solving","Team collaboration","Mentoring"]

Plan, build, and execute verification for new and existing features in custom silicon/ASIC designs, ensuring a bug-free final product. Collaborate with architecture, design, functional DV, emulation, and platform debug teams to translate specs into detailed test plans. Develop and bring up testbenches and verification environments, including functional coverage and assertions, and own DV sign-off with post-silicon debug support and root-cause analysis.

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FursaFursa
AMD
AMD
6 days ago

Senior ASIC IP verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 52 minutes agoStatus: Live

Job Summary

Plan, build, and execute verification for new and existing features in custom silicon/ASIC designs, ensuring a bug-free final product. Collaborate with architecture, design, functional DV, emulation, and platform debug teams to translate specs into detailed test plans. Develop and bring up testbenches and verification environments, including functional coverage and assertions, and own DV sign-off with post-silicon debug support and root-cause analysis.
Location: Bengaluru
Employment Type: Full time
Job Function: Hardware, Embedded & Systems Engineering
Seniority: Mid level

Key Responsibilities

  • •Collaborate with architecture, design, functional DV, emulation, and platform debug teams to understand verification requirements.
  • •Create detailed test plans based on architecture specs and develop verification testbenches.
  • •Ensure functional verification completeness by implementing coverage and assertions and understanding verification methodology.
  • •Own DV sign-off and drive a bug-free design, including thorough sign-off readiness.
  • •Support post-silicon debug by helping root-cause failures and maintain/bring up SoC verification environments.

Pay and Benefits

Salary: INR 2,186,520 - 3,123,600 annually

Key Requirements

  • •5+ years of design verification experience with strong Verilog and SystemVerilog knowledge.
  • •Ability to develop testbenches and thoroughly understand verification environments (stimulus, checkers, scoreboards, coverage).
  • •Hands-on experience with UVM/OVM, functional coverage, and assertions.
  • •Good understanding of SoC design and architecture, including RESET/CLOCK flow, and exposure to verification/debug concepts (e.g., JTAG).
  • •Proficiency with simulation/debug tools such as VCS and Verdi, plus experience debugging firmware and RTL.
Experience:5+ yearsASIC verificationSoCWirelessHigh-speed interfacesUVM
Education:Bachelor's in computer engineering/Electrical Engineering
Skills:CommunicationAnalytical thinkingProblem-solvingTeam collaborationMentoring
Languages:En-us
Tech Stack:VerilogSystemVerilogCUVMOVMVCSVerdiUVM testbenchesPerlPythonMakefileShellJTAGJTAG etcAXIAHBAPBPCIEDDRUSB

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn