Quantum Interposer Design Engineer

Intel
United States
Workplace: OnsiteFull timeUSD 141,910 - 200,340 annuallyFunction: Design (Product/UX/UI/Visual)Experience: 5+ yearsEducation: mastersSkills: ["Communication","Problem-solving","Analytical thinking","Collaboration","Adaptability"]

Design and integrate advanced packaging interposers for silicon quantum processors within Intel’s Quantum Computing Group. You’ll collaborate with signal/power integrity, thermal simulation, and system integration engineers to meet requirements from silicon testchips. Own design validation and verification (including DRC/LVS), deliver design milestones, and communicate technical results via presentations and documentation. Stay current on packaging technologies by reviewing papers and attending conferences.

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Intel
Intel
1 day ago

Quantum Interposer Design Engineer

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Last checked: 4 hours agoStatus: Live

Job Summary

Design and integrate advanced packaging interposers for silicon quantum processors within Intel’s Quantum Computing Group. You’ll collaborate with signal/power integrity, thermal simulation, and system integration engineers to meet requirements from silicon testchips. Own design validation and verification (including DRC/LVS), deliver design milestones, and communicate technical results via presentations and documentation. Stay current on packaging technologies by reviewing papers and attending conferences.
Location: United States
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Perform physical design and integration of interposers for advanced packaging for quantum computing.
  • •Collaborate with stakeholders to meet design requirements including feedback on SI/PI, thermal simulation, and system integration.
  • •Lead design validation and verification, including DRC and LVS.
  • •Deliver and disseminate design milestones to stakeholders and communicate designs through presentations and documentation.
  • •Stay current with packaging technology and design techniques through conferences and paper review.

Pay and Benefits

Salary: USD 141,910 - 200,340 annually
Equity and Bonus:Equity
Perks:Health InsuranceRetirementPaid Leave

Key Requirements

  • •M.S. in Electrical Engineering and 5+ years of physical design experience for silicon testchips and/or interposers.
  • •OR Ph.D. in Electrical Engineering with academic or work experience in related areas.
  • •Experience using Cadence Virtuoso.
  • •Understanding of how signal and power integrity (SI/PI) impacts physical design.
  • •Understanding of advanced packaging technologies.
Experience:5+ years
Education:Master's in Electrical Engineering
Skills:CommunicationProblem-solvingAnalytical thinkingCollaborationAdaptability
Tech Stack:Cadence VirtuosoSynopsysAnsysDRCLVSAPR

Company Brief

Intel
Designs and manufactures semiconductor chips, processors, and related hardware for PCs, data centers, networking, and embedded applications, while providing software and services to accelerate computing across industries globally.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1968
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Glassdoor: 3.8
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