Sr DFT ATPG Lead

AMD
Bengaluru
Workplace: HybridFull timeINR 4,860,800 - 6,944,000 annuallyFunction: Administration & Executive AssistanceEducation: bachelorsSkills: ["Detail-oriented","Communication","Problem-solving","Accuracy"]

Lead DFT/ATPG implementation and verification for silicon bring-up, working with architecture, IP, physical design, and product engineering teams to achieve first-pass success. Own scan insertion and ATPG pattern generation, validate patterns with gate-level simulation, and analyze test coverage and test cost reduction. Provide post-silicon support to improve yield learning and ensure successful production ramp.

Loading

Loading job details...

Preparing the role view and application actions.

FursaFursa
AMD
AMD
10 hours ago

Sr DFT ATPG Lead

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 8 hours agoStatus: Live

Job Summary

Lead DFT/ATPG implementation and verification for silicon bring-up, working with architecture, IP, physical design, and product engineering teams to achieve first-pass success. Own scan insertion and ATPG pattern generation, validate patterns with gate-level simulation, and analyze test coverage and test cost reduction. Provide post-silicon support to improve yield learning and ensure successful production ramp.
Location: Bengaluru
Workplace: Hybrid
Employment Type: Full time
Job Function: Administration & Executive Assistance

Key Responsibilities

  • •Implement and verify DFT architecture and features.
  • •Perform scan insertion and ATPG pattern generation.
  • •Verify ATPG patterns with gate-level simulation.
  • •Analyze test coverage and test cost reduction to improve manufacturing efficiency.
  • •Provide post-silicon support to enhance bring-up and yield learning.

Pay and Benefits

Salary: INR 4,860,800 - 6,944,000 annually

Key Requirements

  • •Understanding of Design for Test (DFT) methodologies and DFT verification experience.
  • •Experience with scan, ATPG, and related test concepts (e.g., memory BIST).
  • •Ability to verify ATPG patterns using gate-level simulation.
  • •Hands-on tool experience with Mentor TestKompress and/or Synopsys Tetramax/DFTMAX.
  • •Proficiency with VCS simulation and Perl/Shell scripting, plus Verilog RTL design experience.
Education:Bachelor's in Computer Engineering / Electrical Engineering
Skills:Detail-orientedCommunicationProblem-solvingAccuracy
Tech Stack:DFTIEEE1500JTAG 1149.xScanMemory BISTMentor TestKompressSynopsys TetramaxDFTMAXVCSPerl/ShellVerilog RTL

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
WebsiteLinkedIn