Design Verification Engineer - Internal IP

Design Verification Engineer to join Etched’ s Internal IP DV team, focusing on robust, high-performance verification of custom IPs (systolic arrays, DMAs, NoCs). You’ll develop UVM testbenches, define verification plans, debug complex datapath issues, and collaborate across RTL, architecture, and SW teams to ensure silicon-ready functionality from end-to-end. This role blends hardware design verification with cross-team coordination in a fast-paced ASIC environment.