Sr. Systems Design Engineer - Data Center GPU

AMD
Markham
Workplace: HybridFull timeFunction: Design (Product/UX/UI/Visual)Education: mastersSkills: ["Analytical problem-solving","Attention to detail","Self-starter","Independent execution"]

Drive post-silicon validation and debug for SOC-level IP blocks on AMD’s Data Center GPU platform. Develop and execute test plans, track coverage, and triage failures by correlating debug data across multiple IP domains. Analyze hangs, stalls, and error conditions using scan dump and debug reports, and work closely with design, firmware, drivers, runtime, and kernel teams to root-cause issues and validate software-hardware interactions and power management behaviors.

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FursaFursa
AMD
AMD
2 days ago

Sr. Systems Design Engineer - Data Center GPU

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Source: Company careers pageValidated by: Fursa AI
Last checked: 44 minutes agoStatus: Live
Reposted: similar role first listed 7 months ago

Job Summary

Drive post-silicon validation and debug for SOC-level IP blocks on AMD’s Data Center GPU platform. Develop and execute test plans, track coverage, and triage failures by correlating debug data across multiple IP domains. Analyze hangs, stalls, and error conditions using scan dump and debug reports, and work closely with design, firmware, drivers, runtime, and kernel teams to root-cause issues and validate software-hardware interactions and power management behaviors.
Location: Markham
Workplace: Hybrid
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Execute and contribute to post-silicon validation for SOC-level IP blocks, including test plan development, test execution, coverage tracking, and issue reporting.
  • •Debug hardware and system-level issues during bring-up, validation, and production, focusing on system IP blocks like DMA engines, interrupt controllers, and data path logic.
  • •Perform post-silicon debug analysis using scan dump tools and debug reports to investigate hangs, stalls, and error conditions at IP and system levels.
  • •Triaging failures by collecting and correlating debug data across multiple IP domains, with guidance for complex cross-chiplet issues.
  • •Work with multiple teams to track test execution and coordinate validation, partnering with design, firmware, driver, software runtime, and kernel teams to understand IP behavior, error propagation, and power management dependencies.

Key Requirements

  • •Experience in post-silicon validation, hardware debug, or a related semiconductor engineering role.
  • •Programming/scripting skills such as C/C++, Python, or Perl.
  • •Debug techniques and methodologies for post-silicon validation.
  • •Experience with board/platform-level debugging, including bring-up, sequencing, analysis, and optimization.
  • •Knowledge of SoC system architecture, including multi-die or chiplet-based designs.
Experience:SemiconductorSoCPost-silicon validationHardware debugData center GPU
Education:Master's in electrical or computer engineering
Skills:Analytical problem-solvingAttention to detailSelf-starterIndependent execution
Languages:English
Tech Stack:CC++PythonPerlScan dumpJTAGDMAInterrupt handlingKernel-level driversOS-level interfacesChiplet

Company Brief

AMD
Designs and produces semiconductor products including CPUs, GPUs, and adaptive SoCs for consumer, enterprise, and embedded markets, competing across PCs, data centers, and gaming industries.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Santa Clara, United States
Founded: 1969
Glassdoor
Glassdoor: 3.9
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