Design Verification Engineer

Texas Instruments
Bengaluru
Workplace: OnsiteFull timeFunction: Design (Product/UX/UI/Visual)Experience: 5-10 yearsEducation: bachelorsSkills: ["Debugging","Problem-solving","Failure analysis"]

Own part of the flash memory controller IP verification from strategy through sign-off. Develop verification plans, coverage strategies, and test cases using simulation and formal techniques. Build UVM components, write assertion checks, run regressions, and debug failures to resolve RTL bugs and improve testbench quality. Improve existing DV flows using modern methodologies, supporting IP-level and SoC-level digital verification for high-density flash memory.

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FursaFursa
Texas Instruments
Texas Instruments
4 months ago

Design Verification Engineer

✓ Verified Job

Canonical indexed version, validated from employer's careers page.

Source: Company careers pageValidated by: Fursa AI
Last checked: 13 hours agoStatus: Live
Reposted: similar role first listed 1 year ago

Job Summary

Own part of the flash memory controller IP verification from strategy through sign-off. Develop verification plans, coverage strategies, and test cases using simulation and formal techniques. Build UVM components, write assertion checks, run regressions, and debug failures to resolve RTL bugs and improve testbench quality. Improve existing DV flows using modern methodologies, supporting IP-level and SoC-level digital verification for high-density flash memory.
Location: Bengaluru
Workplace: Onsite
Employment Type: Full time
Job Function: Design (Product/UX/UI/Visual)
Seniority: Mid level

Key Responsibilities

  • •Own part of the IP design verification from verification strategy to sign-off.
  • •Develop coverage strategy and closure for functional, code, and assertion coverage.
  • •Develop test plans, verification strategy, and test cases using appropriate verification approaches (simulation, formal).
  • •Develop UVM components (agents, drivers, monitors, scoreboards) and write assertion checks for the DUT.
  • •Debug failures, fix the testbench, own regressions, and improve DV flows using latest methodologies/technologies.

Key Requirements

  • •Bachelor’s or Master’s degree in VLSI or a related field.
  • •5–10 years of digital design verification experience.
  • •Strong command of SystemVerilog and UVM.
  • •Experience creating DV environments and tests for IP-level digital DV/SoC-level verification.
  • •Experience with verification tools such as Xcelium and JasperGold (or similar).
Experience:5-10 yearsDigital design verificationEmbedded memory verificationFormal verificationUVM
Education:Bachelor's in VLSI
Skills:DebuggingProblem-solvingFailure analysis
Tech Stack:System VerilogUVMUVM agentsUVM driversUVM monitorsScoreboardsAssertionsFormal verificationConnectivityCOVUNRFPVVerilogAMSXceliumJasperGoldRTL

Company Brief

Texas Instruments
Designs and manufactures semiconductors and analog chips used in industrial, automotive, personal electronics, communications, and enterprise systems. It is one of the world’s largest semiconductor companies, with a broad portfolio of embedded processing and power products.
Industry: Electronics Manufacturing
Company Size: Enterprise (1,001+ employees)
Revenue: USD 1B+
Growth: Public Company
Valuation: Public Company (Market Cap in USD)
Funding: IPO / Publicly Listed
Headquarters: Dallas, United States
Founded: 1930
WebsiteLinkedIn